Mapping from phase to sine amplitude in direct digital frequency synthesizers utilizing Chebyshev polynomial interpolation

Direct Digital Frequency Synthesizers (DDFS) generate a staircase sinusoidal signal with a precisely controlled frequency. Traditionally, the amplitude information of the sinusoidal signal is stored in a ROM. The ROM-based DDFS systems are slow and power consuming. The Polynomial interpolation method is a new method for replacing ROM with high-speed digital circuitry. The interpolation method makes a trade-off between the ROM size and the circuit complexity of DDFS systems. In this paper, the Chebyshev polynomial interpolation method is used to reduce the ROM size. The compromise between the ROM size and circuit complexity is also studied in the paper, and it is shown that the proposed method unifies almost all of the existing interpolation based DDFS systems. Moreover, it is shown that by using the proposed method one can design a DDFS system with an arbitrary spurious frequency dynamic range (SFDR).