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Design Of High-speed Acquisition System Based On CMOS Image Sensor

Posted on:2021-01-02Degree:MasterType:Thesis
Country:ChinaCandidate:F LiangFull Text:PDF
GTID:2428330602465478Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
In recent years,with the continuous development of CMOS manufacturing processes,CMOS image sensors have begun to be used more and more in high-speed image acquisition systems due to their advantages of high resolution,high speed,and low power consumption,and proposed the performance of image acquisition systems.Higher requirements.By comparing and analyzing the main features of each part of the image acquisition system,this paper designs a high-speed image acquisition system based on CMOS image sensor.The system uses FPGA as the control chip to implement the configuration of the image sensor and the processing of image data.For the cache of image data,Gigabit Ethernet is used to complete the transmission of image data.This article mainly introduces from the three aspects of image data reception,image data cache,and image data transmission.DDR2 cache hardware circuit and Gigabit Ethernet hardware circuit are designed on the hardware,and the power supply circuit of the entire system is analyzed in detail.And calculation.Logically,the image data output by the image sensor is sequentially converted from differential to single-ended,double-edge to single-edge,synchronization code judgment,and serial to parallel.Secondly,by controlling the address signal of DDR2,the image data is written into DDR2 or read out from DDR2 according to the size of the Ethernet data packet.Finally,the transmission module completes the encapsulation of the data packet and the analysis of the command frame,and based on the structure of the data frame and command frame of the Gigabit Ethernet application layer,the retransmission logic is designed to realize the re-upload of erroneous image dataThrough design related experiments,the function verification of the image acquisition system is completed,including the comparison of the transmission efficiency of jumbo frames and standard frames,the correctness of the design of the application layer protocol and the retransmission mechanism,and the stability of the image acquisition system.
Keywords/Search Tags:Image Sensor, FPGA, DDR2, Gigabit Ethernet, GigE Vision standard
PDF Full Text Request
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