Research And Implementation Of Hardware Trojan Defense Based On Logic Encryption

With the gradual change of the integrated circuit industry model,hardware trojans have attracted great attentions of many researchers because of their characteristics of strong concealment,large destruction and unpredictability.In addition,due to environmental noise,process variation and the increasing scale of integrated circuit,a series of detection methods proposed early have encountered different challenges.Thus,the research on the strategies against hardware trojans from the perspective of detection purely has met a bottleneck.The research topic of this thesis comes from a project of the national ministry.To solve the problem that the hardware trojan which destructs function by using the low controllability nodes whose signal values are difficult to specify from external input ports and the hardware trojan which reveals information by using the functional outputs which can be obtained directly are difficult to detect,based on logical encryption technology,a method against the above two kinds of hardware trojans from the perspective of defense is proposed in this thesis,including the defense method based on the protection of the low controllability nodes and the defense method based on the protection of the functional outputs in detail.The former encrypts the low controllability nodes by using 4 kinds of key gate circuits as well as 4 kinds of insertion algorithms.Thus,it becomes too difficult for an attacker to insert the hardware trojan which destructs function by using the low controllability nodes in secret without knowing the correct key.The latter encrypts the functional outputs next by using 4 kinds of key gate circuits as well as 2 kinds of insertion algorithms.Thus,it becomes too difficult for the hardware trojan which reveals information by using the functional outputs to reveal information in the circuit correctly when the attacker does not know the correct key.Besides,a design of the key generation unit based on linear feedback shift register is proposed in this thesis in order to improve the security of the defense method.It is embedded on the key transmission path and increases the difficulty for the attack model based on SA algorithm and the attack model based on path sensitization to crack the encrypted circuit.The implementation of the defense method is completed by C program in this thesis.And s1196 circuit,s1238 circuit,s1423 circuit in ISCAS89 benchmark circuits are used respectively as the original design to verify the quality of the defense method from four aspects,including the protection effect on the low controllability nodes and the functional outputs,security and hardware overhead.Then,several models of the hardware trojan which destructs function by using the low controllability nodes and the hardware trojan which reveals information by using the functional outputs are designed in order to test the quality of the defense method to defend against them.The experimental results are as follows.(1)The defense method based on the protection of the low controllability nodes is effective to protect the low controllability nodes existing in the original design.It reduces the area overhead by 7.17% and the timing overhead by 6.44% compared with the existing methods;(2)The defense method based on the protection of the functional outputs makes 41.90% of the functional outputs of the encrypted circuits wrong averagely in the case of incorrect keys input,and the ideal value is 50%;(3)The key generation unit increases the difficulty for two kinds of attack models to crack encryption;(4)The overall area overhead of the defense method is 35.57% averagely and the overall timing overhead can be ignored;(5)After using the defense method,the detection rate of the hardware trojan which destructs function by using the low controllability nodes is increased significantly from an average of 8.33% to an average of 91.67%,while the failure rate of the hardware trojan which reveals information by using the functional outputs reaches an average of 30.52%.