Research And Implementation Of 64QAM Demodulation Data Parallel Carrier Recovery Technology

With the development of wireless digital communication technology,the demand for information transmission rate in the field of satellite communication has increased from hundreds of Mbps to several Gbps in recent years,and even in some fields,application requirements have reached tens of Gbps.Due to the limitation of hardware chip performance,it is difficult to meet the above requirements by relying on single-chain serial data processing scheme.Parallel processing is one of the main schemes of electronic information processing in the current and future decades.The digital signal parallel processing technology of receiving system It will be one of the research hotspots of high performance communication systems.In the digital demodulation system,the carrier recovery algorithm is one of the core technologies.The main function of this technology is to compensate the carrier frequency offset,phase offset and improve the error performance of the receiving and demodulating system.Based on the parallelization structure of the demodulation system,the design and improvement of the carrier recovery algorithm for the Kalman filter in the phase domain and the performance simulation based on the digital phase-locked loop structure are completed by theoretical analysis of various common carrier recovery algorithms.In contrast,the feasibility and effectiveness of the algorithm scheme are verified by hardware verification.The main work of the thesis includes:Firstly,based on the dynamic understanding of large-capacity communication and parallel demodulation conventional schemes at home and abroad,the thesis carried out the theoretical analysis of the parallel architecture of digital demodulation system,established the corresponding architecture model,and completed the digital demodulation based on APRX parallel architecture.The establishment of the system model determines the zero-IF digital demodulation structure as the digital demodulation system model of this thesis.Secondly,the carrier-recovery algorithm based on digital phase-locked loop(DPLL)is analyzed theoretically.According to the characteristics of the zero-IF digital demodulation structure,the phase-frequency phase-detection(PFD)with decisionoriented feedback as the basic idea is selected.The algorithm acts as the core algorithm.At the same time,according to the phase random variation problem occurring in the actual hardware verification process,the DD algorithm is added to improve the accuracy of the algorithm.The PFD+DD dual-mode algorithm formed by the paper can compensate for the random variation of the phase,but it still has the disadvantage of small acquisition frequency offset.In view of the shortcomings of the above dual-mode algorithm,the paper completed the design of carrier recovery algorithm based on Kalman filter.Firstly,the paper analyzes the carrier recovery algorithm based on serial Kalman filter.At the same time,through the method of simulation analysis,the carrier recovery algorithm based on Kalman filter in the phase domain with fast processing characteristics is designed.On this basis,the paper completes the design of carrier recovery algorithm based on Kalman filter in the phase domain under parallel structure conditions.The feasibility of the Kalman filter carrier recovery algorithm in the parallel phase domain is verified by the simulation.The Kalman filter carrier recovery algorithm in the parallel phase domain is used to capture large frequency offset and fast convergence.In this paper,the Kalman filter carrier recovery hardware module in parallel phase domain is developed,and an experimental verification platform is built.The feasibility and effectiveness of the proposed scheme are verified under the external field conditions.The experimental results show that the error rate of the external field link based on the Kalman filter carrier recovery algorithm in the parallel phase domain proposed in this paper can reach 1E-9.