Soft Error Correction Algorithm Based On FPGA And Error Correction Analysis Of NB-IoT Communication Link

In recent years,the Internet of Things has shown rapid development momentum.Especially in the fields of smart manufacturing,smart home,car networking,and environmental protection.IoT devices typically connect to the network via WI-FI,Bluetooth,cellular networks,or low-power wide-area networks,which typically rely on terrestrial network infrastructure,but 80% of the land and 95% of the oceans are not covered by the network.Therefore,these IoT devices without network coverage are a good choice for connecting to the network via satellite.The Internet of Things system based on satellite communication is based on the NB-IoT standard and is appropriately modified according to the characteristics of satellite communication.In the process of communication with ground IoT devices,the satellite will perform digital modulation and demodulation,channel coding and decoding,and synchronization operations in the orbit.We have developed research on FFT,CRC check,tail-biting convolutional coding,Viterbi decoding and synchronization signals.There are a large number of charged particles in the space radiation environment,and the on-board digital signal processing module is susceptible to single-event upset events caused by high-energy charged particles,resulting in data calculation errors.In order to eliminate the impact of single-event flipping,we focus on the anti-radiation fault-tolerant protection of the FFT used in satellite orbit decoding.The traditional FFT scheme based on the remainder check has a large number of butterfly operations,and the rotation factor needs to be expanded by a certain multiple to ensure accurate calculation,resulting in greatly increased complexity.In order to solve this problem,this paper cuts off the data in the middle stage of the FFT,and adds a single sampling decision module before truncation to ensure correct data output.At the same time,it proposes a new simplification for the modulo operation added in the above process.Through functional simulation and comprehensive proof,the proposed scheme achieves an effective reduction of hardware resource occupation overhead.Further,the FFT single-sampling decision-to-error scheme based on the residual check may fail to identify the faulty branch because the remainders of the two original branches and the check branch are the same,and the larger the modulus of the remainder,the fault miss detection The lower the rate,the greater the hardware resource overhead of the fault tolerant solution.In order to obtain the low hardware resource occupation overhead and low fault miss detection rate of the fault-tolerant scheme at the same time,this paper proposes an FFT multi-sampling decision-tolerant scheme based on the remainder check.When the congruence phenomenon occurs,the data output from the two original branches is buffered,and then the next pair of data of the output is compared and judged until the faulty branch is identified,and then the data of the correct original branch buffer is output together.This scheme effectively reduces the failure detection rate of the single-sampling decision-tolerant scheme without substantially increasing the overhead of hardware resources.This paper studies the FFT,CRC check,tail-biting convolutional coding,Viterbi decoding and synchronization signals in the IoT communication link based on satellite communication,and focuses on the FFT anti-radiation fault-tolerant method.Two fault-tolerant schemes based on residual verification are proposed.The simulation results show that the hardware resource occupation cost of the two fault-tolerant schemes is lower than that of the three-module redundancy scheme,and compared with the single-sample decision-to-error scheme based on the remainder check.The fault detection rate of the multi-sampling decision-tolerant scheme based on the remainder check is also effectively reduced.