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SPICE Model Research Of Silicon Carbide 1.2kV SiC JFET Device

Posted on:2019-05-31Degree:MasterType:Thesis
Country:ChinaCandidate:X J LiFull Text:PDF
GTID:2428330590475461Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Silicon carbide semiconductor material has the advantages of wide band gap,high saturation speed,high critical breakdown electric field and high thermal conductivity,nevertheless,the application of SiC metal oxide semiconductor field effect transistor in the field of high temperature were limited by lots of defects in the interface of SiC/SiO2.The junction field effect transistors?JFET?has not the structure of gate oxide layer and shows more better reliability and stability.For this reason,JFET device based on silicon carbide substrate have been widely concerned and applied in power system design.The SPICE model is the bridge between the device and the circuit design.A precise SPICE model of silicon carbide JFET device is critical to the design of power circuits and system.However,there is not a systemic SPICE model which can accurately describe the characteristics of silicon carbide-based JFET device.In this thesis,a complete silicon carbide JFET device compacted model is developed for circuit simulation.Firstly,the basic structure and working principle of silicon carbide JFET device is presented,and the electrical performance influenced by device structure are analyzed emphatically.Secondly,in the DC model,the device structure is divided into channel region,drift region and N+substrate region.The channel current models based on Shockley model are established and the parasitic resistances of drift region and N+substrate region are optimized,respectively.Meanwhile,considering the effects of secondary physical effects and the special performances on the SiC JFET device,the velocity saturation model,channel length modulation model,channel non-uniform doping model and self-heating model are optimized.Thirdly,for the AC model,the charge model of silicon carbide JFET device and noise models are established based on the Quasi-static hypothesis.Finally,the SPICE model of silicon carbide JFET device is realized by Verilog-A language,and the model at 25?175?is validated by measured data.As the results,the mean square errors?RMS?of output characteristics and transfer characteristics descripted by the established model are within 3.2%and 1.98%in this paper,respectively.Meanwhile,the RMS of C-V model and switching characteristics are within 3%and 8%,respectively.The compared results demonstrate that the model gives accurate descriptions for both DC and AC characteristics of silicon carbide JFET device.The accuracy and convergence of the model meet the expected target.
Keywords/Search Tags:Silicon carbide, Junction field effect transistors, Compact model, Velocity saturation, Non-uniform doping, Self-heating model
PDF Full Text Request
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