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The Research And Implementation Of Image Data Acquisition Device Based On Camera Link Interface With FPGA

Posted on:2020-07-26Degree:MasterType:Thesis
Country:ChinaCandidate:S W WeiFull Text:PDF
GTID:2428330575953222Subject:Instrumentation engineering
Abstract/Summary:PDF Full Text Request
At present,the application of high pixel and high frame frequency industrial cameras is more and more extensive.The mass data transmission between high-speed cameras and image acquisition devices puts forward higher requirements for image acquisition devices.High speed,high integration and high reliability are the main development directions of image acquisition devices.As one of the most important standard interfaces of high-speed cameras,Camera Link interface makes the speed match between high-speed image source data and image acquisition device.Therefore,it is of great engineering significance to study the Camera Link image data acquisition device based on FPGA.Combining with research situation at home and abroad,this paper designed a Camera Link based on FPGA can self-powered image acquisition device.Which use FPGA as the core controller,can gather six channel speed variable,one channel PCM data and two channel image data and store it.Those multi-channel real-time data were collected at the same time will upload the upper computer.The built-in backup battery can be realized temporary power supply for device in the case of sudden power outages.First,this paper combined the Camera Link interface standards and actual design requirements,based on the FPGA implementation principle and method of Camera Link data interface are studied.Combined with the specific project requirements this paper designed the data receiving module and real-time upload module based on Camera Link interface.The implementation logic of dynamic phase adjustment is studied in this paper for the source synchronous skew of the receiver.At the same time,this paper studies the measures to suppress error codes on account of the analysis which for the cause of high-speed interface error code,and this paper also proposes a feasible ber test method.Secondly,the logic implementation of the analog data acquisition module was optimized for the acquisition requirements of velocity variables,and because of the characteristics of the PCM data interface an interface circuit was designed for it.Meanwhile,in order to meet the data storage requirements under different transmission rates,the data caching and storage methods were studied.Finally,considering the reliability and data integrity,a standby battery is set in the device,and an smart battery management system is designed based on FPGA for the monitoring and internal balance of the battery,so as to realize the reliable power supply of the device.By building the Camera Link image acquisition device verification platform and test platform,the closed loop of the test link is guaranteed and the device function is verified.It is proved that the image acquisition device can complete and efficiently collect the key signals and store the massive data effectively,meet the design requirements,and has the characteristics of large data volume,strong real-time performance and high reliability.
Keywords/Search Tags:Camera Link, Dynamic phase adjustment, Battery management system, FPGA
PDF Full Text Request
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