Research On Real-valued FFT Architecture And Its Implementation In PRIME Power Line Communication

Power Line Communication(PLC)is widely used in automatic meter reading(AMR),advanced metering infrastructure(AMI)and other applications.Different from the early single-carrier modulation PLC,China State Grid HS-PLC(high speed)and the international standards such as G3-PLC and PRIME are based on Orthogonal Frequency Division Multiplexing(OFDM)modulation scheme.Fast Fourier Transform(FFT)is one of the building blocks in OFDM systems.Previously,the research work on FFT is mostly for ordinary complex numbers,and there is a lot of redundancy when directly applied to baseband transmission OFDM systems.In this paper,the optimization design of the real-valued FFT algorithm,architecture and VLSI implementation is carried out.A set of computation scheme and implementation architecture for Real-valued Fast Fourier Transform(RFFT)and Hermitian Symmetric Inverse Fast Fourier Transform(HSIFFT)is proposed.It can be flexibly and efficiently applied in PLC,digital subscriber line and other baseband communication systems with OFDM modulation scheme.Based on this,a resource-efficient RFFT/HSIFFT processor is designed for PRIME v1.4 PLC.The main research work includes the following aspects:1)Designing the RFFT/HSIFFT optimization algorithm.Considering the simplification and standardization of hardware design,the flexibility and scalability of algorithm implementation are discussed in depth,and a general computing framework is given.2)Comparing and analyzing the mainstream FFT implementation architectures,and exploring the regular characteristics of the algorithm structure in detail.Based on the proposed computation scheme,a flexible and efficient hardware control structure is designed.3)Based on the proposed computation scheme and control structure,comprehensively considering the selection of architecture and hardware resources in circuit design,compromising in accuracy,speed,area and power consumption,and designing an RFFT/HSIFFT processor that meets the computational performance requirements of the PRIME v1.4 PLC system.The RFFT/HSIFFT processor has significant optimization in terms of accuracy,area and power consumption.