Optimization Of MIPS Core Bus Structure Based On AHB Protocol And Implementation Of FPGA Logic Circuit

In recent years,with the continuous improvement of the scale of integrated circuits,chip systems are becoming more and more complex,and the SOC technology on chip system is becoming more and more popular and developing.Among them,the CPU core of SOC on chip system and the bus system playing the role of each module transmission are usually IP and multiplexing technology.Under the same resource conditions and the stable transmission of the functional modules of the on-chip system,the excellent bus system structure can greatly improve the transmission efficiency of the system.Under this background,the transmission characteristics of M5100 CPU of MIPS architecture and the AMBA protocol bus are analyzed and summarized.The bus system under the framework is used as the research object to improve the transmission efficiency of the bus system to improve the performance of the system as the research target.Finally,the logic circuit is implemented on the FPGA.Research on the content below:(1)Mcu_wrapper module optimization:the mcu_wrapper module integrated with CPU in the bus system is studied and optimized.Optimize and improve data flow for M5100 CPU protocol conversion module.The signal that originally connected to protocol conversion module is classified and output.All the signals of the AHB operation and memory operation initiated by CPU before the optimization are converted to the AHB protocol signal,and the memory operation signal initiated by CPU is directly connected with the external protocol conversion module.The delay of the optimized mcu_wrapper module in the memory operation is reduced from multiple clock cycles to a clock cycle,and the transmission efficiency has been greatly improved,which greatly reduces the delay caused by bus arbitration.(2)Ahb_ram module optimization:research and optimize the external protocol conversion module ahb_ram in the bus system.The optimization and improvement of data flow for external protocol conversion module based on two kinds of protocol transmissions is proposed.The original single AHB protocol is converted into a memory protocol signal,which is optimized to determine the interface of the peripherals storage device to select the AHB protocol and the memory protocol signal through the state jump in the state machine.This optimization method increases the flexibility of various protocol access storage devices and improves the overall performance of the system.(3)Simulation platform construction and verification:build a system level simulation platform,including master slave,and design verification items according to design principles.It is mainly verified that the reading and writing signal ports of the AHB protocol of the mcu_wrapper module,the delay of the read and write port of the memory protocol,the read and write port of the AHB protocol of the ahb_ram module,the delay of the read and write port of the memory protocol,and the relative position of the system clock and the read and write signals.After optimization,The read operation reduces 6 clock cycles,which greatly improves the transmission efficiency of the system.