Study Of Novel Tri-independent-gate FinFET And Its Application In SRAM Design

With the dramatic development of VLSI process technology,the feature size of semiconductor core device has reached to nanoscale.The traditional MOSFET can no longer meet the needs of industry due to the severe short channel effects(SCEs).Fin FET has become the mainstream device in deep nanometer process because of its superior gate control ability over the channel.Nevertheless,due to the quasi-planar structure,the width of Fin FET only can be increased in quanta of fin height.Therefore,it is difficult to optimize the performance of Fin FET-based circuit under arbitrary width-length ratio,especially in static random access memory(SRAM).In this dissertation,a novel tri-independent-gate(TIG)Fin FET is proposed.Five kinds of threshold characteristics can be offered by TIG Fin FET without additional voltage sources,and it is demonstrated to solve the read-write conflict in 6T SRAM and bring the design with great flexibility.The major contents and achievements in this dissertation include the following parts:To improve the conventional Fin FET structure,we have proposed a novel tri-independent-gate Fin FET.The entire integration flow of proposed TIG Fin FET is fully compatible with the conventional CMOS process,which brings it the advantage of industrial manufacture.The performance of two kinds of TIG Fin FET,including Single-fin and Double-fin TIG Fin FET,is deeply researched in this dissertation.Based on sentaurus TCAD,we have finished the DC and AC simulation of newly proposed device.The results show that five different ON-state modes all exist in Single-fin and Double-fin TIG Fin FET without additional voltage sources.The ratio of saturation current among Mode5 to Mode1 is about 1:0.84:0.41:0.3:0.03 in Single-fin TIG Fin FET and 1:0.3:0.7:0.15:0.41 in Double-fin TIG Fin FET.The different performance among diverse ON-state modes brings Single-fin and Double-fin TIG Fin FET great flexibility in the circuit design.Two kinds of SRAM cells based on Single-fin and Double-fin TIG Fin FETs have been designed in this dissertation.Both of SRAM-TIG1 and SRAM-TIG2 use P type Single-fin device and N type Double-fin device to realize cross-coupled inverters contained in SRAM cell.SRAM-TIG1 using Single-fin TIG Fin FETs as access transistors offers at most 62.9%increment in read static noise margin(RSNM)without any decrement in write ability.It also provides five read operations to meet the needs for high speed or high stability occasions.SRAM-TIG2 using Double-fin TIG Fin FETs as access transistors offers at most 68.2%increment in write margin and 51.7%decrement in write delay without any RSNM reduction.Moreover,three modes can be chosen in SRAM-TIG2 during read operation for speed-stability tradeoff and no layout penalty exists compared to the conventional Fin FET SRAM cell.The work of this dissertation has important guiding significance to solve the read-write conflict and improve design flexibility in Fin FET SRAM cell under deep nanometer process.The achievements of research have been published.