Circuit Optimization And Research Of DPWM Module In DC-DC Switching Converter

The feedback loop of the DC-DC switching converter is dominated by analog technology.However,analog pulse width modulation(APWM)is susceptible to process,voltage,and temperature and therefore has poor stability.With the development of semiconductor technology,digital pulse width modulator(DPWM)based on standard cell libraries or field programmable gate arrays(FPGA)can overcome the above disadvantage and easily achieve high time resolution such as nanosecond or smaller.However,the logic and interconnect delays of critical path in DPWM are superimposed on the positive pulse width of output signal,causing the larger duty cycle compared to the theoretical value,namely duty-cycle-increased phenomenon.Especially when the time resolution is under 100 picosecond,the effect of critical path delays is even more serious.In view of the above-mentioned phenomenon,this paper proposes a hybrid DPWM structure based on counter,phase-locked loop(PLL)and carry-chain.In this structure,critical path is optimized by some methods such as structure optimization,interconnect optimization and logic assignment.The set_net_delay in the timing constraint file is added to the set of DPWM,and within the FPGA chip,the critical path delay is accurately compensated based on the Manhattan distance,thus solving the duty-cycle-increased phenomenon and improving the DPWM accuracy.In addition,the DPWM achieves higher time resolution,a wider duty cycle range and higher linearity after optimization and compensation.An 11-bit,9.375MHz switching frequency DPWM is validated and implemented on the low-cost Cyclone IV series of FPGA.This DPWM shows a small jitter by measuring the period and the time internal error(TIE)jitter,and the linearity fitting value R~2 is 0.9949,so the stability of the DPWM is high.In addition,the DPWM time resolution is 53ps and duty cycle range is from 1.52%to 97.81%.Due to the superposition of logic and interconnect delay,the duty cycle increased by 3.08%,and this article successfully solves the duty-cycle-increased phenomenon after optimization and compensation.