A IF Filter With High-accuracy Auto-tuning Circuit For GNSS Receiver

With the rapid development of microelectronics technology,radio frequency wireless receiver is changing with each passing day.The multi-mode multi-frequency receiving system based on CMOS technology has obvious advantages in terms of cost over single-mode system,and it has received extensive attention in wireless communication field.Filter as one of the most significant modules in the RF receiver,its performance greatly affects the performance of the entire communication system.In the multi-mode multi-frequency receiving system,the filter must be able to meet different modes and multiple frequency bands of the requirements,which requires its function,structure and corner frequency to be reconfigurable.The object of this paper is the IF filter of GPS/Beidou dual-mode receiver RF chip,which is used to filter out-of-band noise,suppress image interference and provide appropriate gain for weak GNSS signal.In this thesis,the principle of mirror interference is described,and then the method of suppressing image interference is determined.At the same time,the theory of the filter and the design index of the RF front end are studied furthermore the scheme of the filter is designed.This thesis also analyzes the mechanism of the frequency error and DC offset problem in IF filter,furthermore selects corresponding calibrating method.The whole design process of the filter and key modules is described in detail,which realize the function of reconfigurable gain,bandwidth and center frequency.A new frequency compensation method is put forward to ensure the stability as well as increasing operational amplifier's bandwidth,which could efficiently suppress non-ideal effects owing to limited bandwidth.Simulation results show that the power consumption is 5.4mW with 1.8V supply,the filter's bandwidth and center frequency can be configured to 2.5/5MHz and±4.092MHz,the image rejection ratio exceeds 32dB,DC offset voltage is less than 2mV.This filter is fabricated in TSMC 0.18m CMOS process,the die area is about 4.7mm2,the test results basically agrees well with simulation results that meet the GPS/Beidou dual-mode receiver's specifications.