Study On Fabricating High Quality Germanium Fin Based On Bulk Germanium

It has become increasingly difficult to improve the performance of Si CMOS because the conventional scaling of Si MOSFETs is approaching its physical limit.The Si FinFETs have been implanted to CMOS technology to overcome the scaling limit of conventional planar-structured Si MOSFETs.However,in order to further improve the performance of CMOS devices,the FinFETs with high mobility channels are necessary.Among all high-mobility semiconductors,Ge is considered as one of the most promising channel materials because of its high bulk electron(3900 cm2/Vs)and hole(1900 cm2/Vs)mobility,as well as its superior compatibility with current Si technology.Recently Ge MOSFETs with fin-structured channel have been demonstrated.Nevertheless,the performance of these Ge FinFETs,especially the high field mobility,still desires improvement for future CMOS applications.It has been confirmed that the high field mobility in planar Ge MOSFETs that the high field mobility in Ge channels are strongly affected by the surface roughness at Ge MOS interfaces.Therefore,the formation of Ge fins with small surface roughness is needed for realizing high performance Ge FinFETs.In contrast to inductively coupled plasma(ICP)etching which is commonly applied to deep etching of Si,RIE is more preferable technique for Ge fin etching.A kind of new etching method,SF6/CF4 syclic etching method,was introduced to etching germanium,which could reduce the RMS surface roughness induced by RIE etching to 1.1 nm.Due to using EBL was inconvenient and costly;an alternate method named"spacer" was employeed to this experiment.By using ALD,RIE and UV-lithography,80nm width lines were got.