Research On Short Range Millimeter Wave LFMCW Radar Digital Receiver

With the frequent occurrence of terrorist attacks,security problems in crowded public places are becoming more and more important.As a safe and efficient body security inspection equipment,near-field millimeter wave imaging system for security has been widely used in various safety inspection places.The short range millimeter wave LFMCW radar digital receiver is an indispensable part of the near-field millimeter wave imaging system and it is the most critical data preprocessing module in the whole system.Its performance has a direct impact on the accuracy and efficiency of data processing in the near-field millimeter wave imaging system.Therefore,it is of great practical significance to study the optimization algorithm of digital receiver and improve its processing speed.In this thesis,the modular design of the digital receiver is studied.A digital receiver system based on software-defined radio is completed and implemented on the FPGA development board by using the advanced model-oriented System Generator for DSP hardware design tool with the softwares such as MATLAB,Vivado and ModelSim.The main research can be summaried as follows:1.Aiming at the shortcomings of the traditional look-up table method to realize the Numerically Controlled Oscillator(NCO),the thesis studies on the characteristics of Coordinate Rotation Digital Computer(CORDIC)algorithm and it's principle of NCO and mixer implementation.By using CORDIC algorithm,not only the design of NCO can be achieved,but also the mixing operation of the Intermediate Frequency(IF)digital signal and the local oscillator signal can be completed.It can save the multiplier resources.In addition,the full pipelining technique is adopted to improve the processing speed.2.The thesis researches on the decimation and filtering principle of Cascade Integrator Comb(CIC)filter and analyzes the parameters which affect the performance of CIC filter.Then,according to the system requirement,the thesis designs a five-stage CIC filter and optimizes the bit of data width of the middle stages which reduces the hardware resource consumption and improves the operation speed.3.In order to meet the data processing requirements of near-field millimeter wave imaging system for security,a high speed FIR filter with improved bit parallel Distribute Arithmetic(DA)algorithm structure is designed in this thesis.It improves the efficiency of data processing and saves the hardware resources.4.The system generator for DSP software is used to design and simulate the various modules of the digital receiver.Then,the digital receiver system is tested and verified by the test platform.Finally,the digital receiver system is implemented on the Zed Board development board of Xilinx.