Research On S-Band Cascade Offset Phase-Locked Frequency Source

Since the S-band signal has the advantage of longer transmission distance,the S-band frequency source is often used for mid-range alert radars and tracking radars.It is also commonly used in televisions,mobile communications,and astronomy.As the communications industry continues to advance,expectations for frequency sources have become more stringent.In order to achieve low phase noise,high frequency resolution,small size,fast frequency requirements,Frequency synthesis techniques such as DDS with high frequency resolution and cascade-based phase-locked loop with low phase noise are usually mixed used.This paper designs a S-band frequency source based on two-stage cascaded bias,including three modules including S-band voltage controlled oscillator,reference source circuit module and cascaded offset lock module,and control unit module.For the design of the VCO module,first select the structure of the tuned filter that plays a key role in the VCO and the varactor that meets the design requirements,select the appropriate transistor and the appropriate DC bias circuit,and tune the filter and VCO separately.Simulations were performed to optimize the selection between the roll-off factor of the tuned filter and the phase matching of the VCO.Finally,an oscillation range of 2.2 GHz to 3.2 GHz and a smaller VCO was obtained.the phase noise test result is-122dBc/Hz@10MHz,In order to enable the output frequency of the VCO to quickly reach the desired frequency,a peripheral circuit composed of a C8051 microcontroller,a DAC,and the like for a preset frequency is designed for it.For the design of the reference source circuit module,the circuit design of the 1600 MHz reference frequency is first analyzed in detail.The 1600 MHz is used as the input reference frequency,and a continuous adjustable output of 1706 MHz to 1750 MHz with a frequency resolution of 0.1Hz is generated by combining the DDS and the phase-locked loop.frequency.The output of this phase-locked loop will be input as a reference source frequency to the cascaded offset phase-locked module.For the design of the cascade bias phase lock loop(PLL),the traditional phase locked loop frequency divider in the feedback loop is composed of two slopes union mixing and was replaced by the combination of frequency multiplier,and the phase noise index has been greatly improved.In order to get the desired output frequency,frequency multiplier in the feedback loop can be controlled by the program.The three modules are integrated together.Under the effect of precise algorithms and procedures,an S-band cascade biased PLL frequency synthesizer with an output frequency of 2.2 GHz to 3.2 GHz is obtained.Finally,the S-band cascade biased phase-locked frequency source was tested and the results showed that the phase noise at 2.2GHz to 3.2GHz frequency output was better than-101.5dBc/Hz at a deviation of 10 KHz,and the tested frequency resolution was better than 1Hz.