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Research On Data Cache Pre-fetch Algorithm Of Heterogeneous Multi-core Processors

Posted on:2017-03-25Degree:MasterType:Thesis
Country:ChinaCandidate:J G ZhangFull Text:PDF
GTID:2348330554450012Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
With the advent of multi-core processors,the expanding performance gap between the processor and the memory exacerbates the "memory wall" problem.Data prefetching method is an effective approach to solve this problem.Prefetching method hides the long memory latency by predicting which data will be accessed in the near future and fetches it into the shared Cache before it is accessed.The applications with irregular memory access and poor locality would cause serious Cache missing in the run-time.The data prefetching method based on helper thread is an effective way to improve performance of those applications.Helper thread hides the memory latency by pre-fetching data from Memory to Cache which is the closest one to CPU.This prefetching technology has attracted more and more attention in the prefetching field.However,helper thread prefetching efficiency depends on the selections of control parameters.If the overhead of memory access for a given application is far greater than that of computation,it would make helper thread lag behind the main thread and decrease prefetching efficiency.This paper focuses on the helper thread prefetching technology for irregular applications,based on the shared Cache chip-multiprocessor platform.First,we introduces the features of irregular applications,data prefetching technologies,the optimal values of control parameters and existing methods of prefetching,such as hardware prefetching,software prefetching,software and hardware integrated prefetching and helper thread prefetching.By analyzing the advantages and disadvantages of those prefetching methods,we propose an improved helper thread pre-fetching model by control parameters.Furthermore,gradient descent algorithm is one of the machine learning algorithm which is adopted here to determine the optimal control parameters.The speed difference between the helper and main threads greatly affects the prefetching performance.The amount of the memory access tasks are controlled by the control parameters effectively,which makes helper thread can be implemented ahead of main thread.To find the best values of control parameters,traditional enumerable method is time-consuming and complex.Comparing with traditional method,the method proposed in this paper is more efficient.Our method is validated on multi-core processor platforms by using SPEC2006 and Olden benchmarks.The experiment results show that speedup of those benchmarks are achieved by 1.2 times to 1.5 times.
Keywords/Search Tags:data pre-fetch, helper thread, multi-core system, memory latency, gradient descent, irregular application
PDF Full Text Request
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