Research On Hierarchical Verification Platform Based On UVM

With the improvement of the complexity and integration of the system on chip,the verification of the chip is also facing great challenges.UVM,as the latest and widely used verification methodology in the industry,greatly improves the efficiency of verification.However,in the existing UVM verification platform,the verification components are tightly coupled to the DUT,resulting in poor reusability;on the other hand,the definition of UVM transaction using the Field-Automation mechanism,the call path is too long,increasing the test cases simulation time.Therefore,the concept of public library is introduced.Taking the verification of serial bus protocol as an example,a reusable public library is designed by using hierarchical modeling method,and the traditional transaction definition is improved by rewriting the virtual function.The main contents and the innovation points of this thesis were as follows:1.The commonality of serial bus protocol is analyzed,a hardware design architecture for multi standard serial bus is proposed,the multi serial peripheral interface protocols are implemented through software configuration.Based on the understanding of the design specification of serial bus,the verification function point is extracted.2.The hierarchical public library design is proposed for the existing verification platform defects.The Hierarchical public library is based on the reuse level and content of the verification platform for management and modeling,including transaction level modeling,component level modeling,function level modeling and UVC level modeling.Compared with the original verification platform,the design of the public library improves the reusability of the verification component and shortens the development cycle of the verification platform.3.The improved transaction definition is proposed for the defects of the long simulation time.The improved definition has no macro statement and rewrites the corresponding virtual function according to the content of the protocol.Compared with the original transaction definition,the improved transaction definition does not have too long path calls.The overridden virtual function has less code and no redundant code executing,improving the simulation efficiency.This thesis completed the design of the serial bus verification platform based on the public library and the improved transaction definition.Design test cases complete the function verification of the serial bus module level and the chip level.The experimental results show that the public library can be used to quickly build a serial verification platform;the improved transaction can shorten the simulation time of 10.7%,improving the verification efficiency.