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Research And Design Of 16-bit Reversible ALU

Posted on:2018-09-10Degree:MasterType:Thesis
Country:ChinaCandidate:C Z WangFull Text:PDF
GTID:2348330536452544Subject:Control Science and Engineering
Abstract/Summary:PDF Full Text Request
Nowadays,power consumption has been proved to be one of the main problems obstructing the development of large scale and high density integrated circuits.A much more fundamental problem has already been pointed out by Landauer?s principle,which is each time information is lost,energy is dissipated regardless of the underlying technology.Thus,the study of synthesis of quantum reversible logic will contribute to the progresses of ultra-low power IC?s design and quantum computing.However,the research on the synthesis of quantum reversible logic is still in its early stage,and the related knowledge and experience are insufficient.In contrast,through a long process of development,the design of conventional logic has formed a mature theoretical system.Therefore,in this theses,we focus on how to transplant the design methods which are widely used in conventional logic into the design of reversible logic.Large scale reversible circuits are designed to prove its feasibility.Toffoli gate,as the universal gate in quantum reversible circuits,has the similar logic function as XOR gate.The principle of the synthesis method of reversible circuit based on ESOP expression is that the logic functions are transferred into ESOP form,and generate logic circuit based on it.This method has the advantages of intuitive and easy to implement,which makes it the most suitable for manual design.However,for the circuit with big scale,this method will be no longer valid.Inspired by the modularization method,we could synthesize the module first by using ESOP expression and compose them by adding some auxiliary bits to ensure the reversibility.In this thesis,we design a 16-bit reversible ALU based on 74182 CLA and 74181 ALU and a 4-bit reversible array multiplier using such method.For the multiplication,the scale for combinational multiplier increases rapidly along with the growth of operation bits.In conventional logic,the multiplication operation is implemented by sequential circuit.However,the design of sequential quantum circuits is still in the early stage,which is due to the limitation of the "feedback" in the quantum circuit.At present,the research of sequential quantum circuits mainly focuses on the design of quantum trigger,while little effort has been made on the synthesis flow of sequential quantum circuits.For the synthesis flow of sequential quantum circuits based on state graph which has already been proposed,there are some strict limitations to it.In order to make the procedure applicable to arbitrary state graph,normalizing operation has to be performed to some special node.The synthesis of one special node is divided into six operational zoon with different functions to ensure the reversibility.In this thesis,a new method for the synthesis flow of sequential quantum circuits is proposed,which greatly improves the defects of previous method,and has the advantages of easy to understand and implement.In order to prove the feasibility,we designed a multiplier based on sequential quantum circuits using this method.
Keywords/Search Tags:Reversible logic circuit, Quantum logic gate, Synthesis of quantum circuit, Combinational quantum circuits, ALU, Quantum sequential circuits, Sequential multiplier
PDF Full Text Request
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