Research On Weak Signal Acquisition Algorithm In B1 Band For Bd2 And Implementation On FPGA

In recent years,with the development of China's Beidou satellite system,Beidou second-generation system has been completed,with regional service capabilities.China is accelerating the construction of the Beidou global navigation system.Beidou global navigation system is expected to complete the network around 2020 and provide services for global customers.With the increasing demand for location service applications of Beidou satellite navigation system,the navigation requirements under various conditions are putting forward new requirements for all aspects of navigation system.In cities,forest roads or indoors,the power of navigation signals in these environments can be affected by multipath,wall-through losses,and so on.The new navigation and positioning technology under the weak signal environment has received more and more attention.Beidou baseband signal processing is a very important part of the Beidou receiver.The acquisition and tracking performance directly determines the overall performance of the whole receiver.This thesis focuses on the acquisition of the Beidou satellite signal in weak signal environment and FPGA implementation.Firstly,this thesis introduces the composition of Beidou system and its signal structure and characteristics,including navigation data structure,ranging code generating principle and its related characteristics.Secondly,the principle of the navigation receiver and the principle of signal acquisition are introduced.Three traditional acquisition algorithms are compared by analysis and simulations.Coherent integration,incoherent integration and differential coherent integral are analyzed and compared in the weak signal environment.Meanwhile,the half bit alternation method,the double block zero padding(DBZP)method and the full bit method are discussed to extend the data processing length.Then,aiming at the problem of the bit transition of navigation message,a time parallel acquisition with transition detection(TPATD)algorithm is studied,and the algorithm is simulated and analyzed.The simulation results show that the algorithm can capture weak Beidou satellite signal for the carrier-to-noise ratio of 28dB/Hz when the false alarm probability is 10-3,and capture probability of not less than 0.995.Finally,using Verilog language and module division method on ISE Design 14.7 Suite platform,the parallel acquisition algorithm of inversion detection time domain is implemented by FPGA.In this paper,an improved implementation scheme is proposed to avoid the unreasonable resource usage in FPGA implementation,and using Xilinx's VC707 development kit to on board verification.The design of FPGA capture module to achieve the Beidou second-generation B1 band D2 signal capture function,it can be easily implemented on the chip,and it has a strong practicality and extendibility.