Optimization Design Of 650V Power VDMOS With JTE Structure

High-voltage VDMOS devices need to use the termination structure to alleviate the junction curvature effect.In the design of VDMOS devices,the performance parameters of termination structure such as higher breakdown voltage,shorter terminal length,lower leakage current and surface electric field peak are very important for the stability and reliability of the chip.Combined with the traditional structure and design methods of field plate,field limiting ring,JTE and so on,the composite termination structure has been widely studied in academic.In this paper,four kinds of terminal structures of MFLR,FP-MFLR,JTE and FP-JTE were optimized for 650V VDMOS devices.Through the analysis of PN junction breakdown mechanism,650V VDMOS cell structure has been simulated and designed by impact ionization rate Lackner model.After tested,breakdown voltage reaches 773.3V,on-resistance is 6.73?,and threshold voltage is 2.66V,which meets the design requirements.The punch-through structure has been employed and the maximum electric field is 2.55×10~5 V/cm.On the basis of determining the parameters of cell structure,the single and multiple field limiting rings,the metal and polysilicon composite field plate and the single-zone JTE structure are optimized without changing other process conditions.It is found that breakdown point is not on the same horizontal line,but gradually from the inside out to the silicon surface when main junction and field limiting ring break down at the same time.The outer ring is the non punch-through breakdown,and the other is the punch-through breakdown.The surface electric field peak on each node increases gradually from interior to exterior.And the peak surface electric field of main junction is slightly lower than that of field limiting ring.Metal field plate completely covers polysilicon,and the suitable polysilicon and metal plate length make the surface electric field have three peaks,and the surface electric field peaks of main junction and metal field plate have been pulled down by polysilicon field plate.Seal ring or channel stopper is arranged outside the depletion layer boundary to avoid the influence on breakdown voltage of termination structure.Based on this,breakdown voltage of 6FLRs termination structure reaches 679V with the length of 183.8?m,and surface electric field peak reduces to 2.34×10~5V/cm;FP-MFLR to achieves 700V with terminal length down to 171.8?m,the surface electric field as low as 2.11×10~5V/cm;the single-zone JTE structure is 713.4V,the length further reduces to 141.8?m,and surface electric field peak of 1.9×10~5V/cm is the smallest in four structures;FP-JTE structure possesses the largest voltage of 757.7V,voltage efficiency up to 98%,which is almost close to the cell structure,with the minimum length of 139.2?m,and surface electric field peak is 2.28×10~5V/cm.In addition,four termination structures are compatible with the traditional process,easy to implement.Meanwhile,FP-MFLR and FP-JTE structures are less affected by interface charge with relatively higher stability and reliability.