Design And Implementation Of An Effective Chip-to-Chip Interconnect Protocol

With the increasingly mature semiconductor technology,very large scale integrated circuit developed rapidly.However,there is still an insurmountable gap between the performance of traditional single-core processor architecture and the current needs from compute intentive applications,such as nuclear energy development,space exploration,and hot artificial intelligence.Therefore,the computer architecture gradually developed from single-core to multi-core,many-core,or multi-chip.Homogeneous multi-core architecure,repesented by Intel-cihp,and the heterogeneous multi-core architecure,represented by NVIDIA-chip,have gradually become the inevitable trend of chip design.In this context,how to transmit data accurately and efficiently becomes the important technical focus and the difficulty of multi-core or multi-chip architecture.There are mainly two kinds of chip-to-chip interconnect architecuture: fat-tree-topology protocol supporting routing function,and fully-interconnect-topology protocol without supporting routing function.When the amount of the co-processers is lower than 8,fat-tree-topology protocol cost more than fully-interconnect-topology protocol in area and power,because of the complex design of the controller module and the switch devices used for transmitting data packets.There are also two kinds of implementation method: serial technology and parallel technology.With the area of the whole chip diminishing quickly,parallel technology causes much more clock skew and crosstalk.Further more,large number of pins results in more difficulty for implementation and high cost for package.Therefore,an efficient and reliable fully-interconnect serial protocol for multi-chip architecture design is of great significance.To meet the requirement of real-time and high bandwidth of chip-to-chip interconnect,we studied the existing interconnection protocol carefully,and proposed a high-speed serial interconnect protocol,named SLink,which contains the feature of low-latency,low-cost and high-scalability.Based on fully-interconnect topology,SLink employs packets to accomplish data transmission.SLink is a layered protocol,consisting of a Transaction layer,a Data Link layer,and a Physical layer.This protocol supports concise packet format,serial transmission with SerDes module,and configurable CRC detection and retransmission mechanism.Based on SLink protocol,we provide an implementation method,and the results of software simulation and FPGA prototype verification.Compared to the PCI-Express 2.0,the results of experiments illustrate that the latency decreases by 61.0%;the available bandwidth increases by 55.6% and the area required by the controller decreases by 97.5%.