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Power Quality Detection Algorithm Research And Design Of FGPA System Device

Posted on:2018-09-08Degree:MasterType:Thesis
Country:ChinaCandidate:Y B WangFull Text:PDF
GTID:2348330512973309Subject:Control theory and control engineering
Abstract/Summary:PDF Full Text Request
Power quality has always been the focus of attention,the development of each hardware condition or the updating of software algorithms,along with the improvement of people's power quality detection devices,because with the development of science and technology,people's dependence on electronic products is much more,electronic products has strong sensitivity on the power quality,along with the power quality requirements are also getting higher and higher.A number of multi-function,high precision and real-time power quality detection devices are need more and more.In this paper,the harmonic detection method of power quality and current research status of power quality detection devices are studied.According to the current harmonic detection using fast Fourier transform,there will be spectrum leakage due to the lack of fixed period sampling.And the fence effect on the accuracy of harmonic detection,a sampling hardware synchronization circuit is proposed.According to the fluctuation of the sampled signal frequency,real-time synchronization latch,trigger sampling,to achieve the effect of fixed-period sampling.At the same time,an algorithm of FFT power harmonic analysis based on Kaiser window is proposed,which makes full use of Kaiser window function to change the energy proportion between the main side lobes.At the same time,Quadratic line interpolation is proposed,and the accuracy of harmonic calculation is further improved.Simulations of four spectral lines interpolation algorithm based on Kaiser window are carried out.In the hardware platform design,the device uses the FPGA as the main control chip,the external circuit,including voltage transformers,current transformers and filter circuit composed of pre-signal conditioning circuit,analog-to-digital conversion circuit.On-chip FPGA to achieve the control of the AD sampling,and the use of on-chip data acquisition ROM window processing function,the use of FFT IP core for fastFourier transform.And embedded in the FPGA Nios II processor,the further processing of data,and finally through the Ethernet transmission to the host computer to display,to achieve power quality remote real-time detection purposes.The experimental results show that the system can realize the real-time detection of the basic parameters of power quality.
Keywords/Search Tags:Kaiser window, Four-spectrum-line interpolation, FFT, FPGA, Power quality detection
PDF Full Text Request
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