Design Of Real-time Image Rectification System Based On FPGA

The image quality can be significantly debased by the non-linear distortion that caused by the perspective feature of optical lens.This thesis presents a FPGA-based system for real-time rectifying an image with non-linear distortion and focuses on reducing the memory cost of the FPGA and improve the efficiency of line buffer.The design has high application value in various areas which require high-precision image quality,such as medical images,remote sensing,video security monitoring,rear camera and multi-camera system.The main work and innovations of this thesis are as follows:1.According to the continuity of the non-linear lens distortion,16-points interpolation scheme is used to dramatically compress memory consumption of the coordinates LUT,which adopts bilinear interpolation to obtain all pixels coordinates of the 16×16 grid by the four corner coordinates.2.Line buffer can not be compressed for the video images in real time,therefore this thesis presents a line buffer algorithm basing on reading extension,which utilizes the horizontal banking to extend the reading period.The algorithm makes down warping and up warping share the same memory block and guarantees the write and read pointers dynamical jumping to provide the space for up and down mapping.The dedicated control scheme can reduce nearly 50%of the memory usage in contrast to a general circular buffer of maximum offset.3.The line buffer basing on Block-RAM is applied to improve the hardware performance.According to the odd-even rule of the reading address,system can get four pixel values from four BRAMs respectively in one pixel cycle for bilinear interpolation.The image rectification system has been implemented on one single FPGA chip to remove lens distortions in real time.The experimental results prove that the proposed LUT compression algorithm and line buffer algorithm are highly effective in both memory reduction and distortion rectification.