Performance Optimization Of A Real Time Processor Using HOG Operator For Pedestrian Detection

Pedestrian detection can be applied in vehicle driving assistant system, real-time video monitoring, etc. Pedestrian detection has been a hot research topic in the field of computer vision. Dalal B. and Triggs N. proposed a Histograms of Oriented Gradients combined with support vector machine(SVM) method, which is used for pedestrian detection with the accuracy rate of 89%(FFPW=10-4). But the algorithm has many disadvantages, such as complex calculation, poor real-time performance and so on. A lot of improved methods are proposed in the papers based on HOG for pedestrian detection. However,many of them are not for real-time video detection, but rather limited to the detection of a picture. Based on the analysis of these papers, a reasonable real-time pedestrian detection method is proposed in this paper.This paper designs a pipelining and parallel computing processor for real-time pedestrian detection. Compared with the related papers, the computation speed of the pedestrian detection real-time processor is improved in this paper. Under relatively low hardware resources, the high detection accuracy is maintained using fixed-point calculation to achieve HOG. Compared with the original algorithm, the accuracy rate is reduced by 1.852%. In the original algorithm, using the software to achieve a non maximum suppression algorithm is need to solve the problem of overlapping detection window. In engineering practice, the software and hardware collaborative processing is very complicated. In this paper, by comparing the calculation results of the detection windows on the hardware platform, the overlapping detection windows are fused into a window. The method of this paper on the hardware platform is simple and stable.We use AVNET spartan6 150 t video development kit and HD camera PE1005 S to build a real-time video capture and display system. The video data collected by the camera are input into the FPGA chip, which are converted into identical data of two channels being written into the DDR for buffer. Then read the video data of the first channel from the DDR, calculate the HOG, and write the test results into the DDR cache. Finally read out video data of the second channel and test results from the DDR being sent to display. The experiment in the actual scene shows that the system can relative accurately detect the pedestrians who keep a certain distance with the camera and is rarely seen overlap detection window or false positive phenomenon. Compared with the results of the software platform, the system meets the requirements of real time. Compared with the experimental results of related paper, the resources occupied by the real-time pedestrian detection system in this paper are reasonable.This paper firstly introduces the research status of pedestrian detection, the related knowledge of pedestrian detection and the embedded system based on FPGA. Then the pedestrian detection algorithm based on HOG and SVM is discussed in detail. A design scheme of pedestrian detection is proposed, and the design framework of each module is given. Finally the experimental results are given and optimized.