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Design Of BPSK Short-range Wireless Communication Chip

Posted on:2016-10-07Degree:MasterType:Thesis
Country:ChinaCandidate:Y F YangFull Text:PDF
GTID:2348330488974211Subject:Engineering
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In the past ten years, with the rapid development of digital wireless communications technology, the conventional mobile communication has entered a new chapter. The short-range wireless digital communications, by virtue of its small size, the ship come quickly to high, low power, and low cost, has been widely applied in the smart home, medical equipment, mobile short-range communications, industrial control and automation industry. But compared with foreign contries, it is late for Domestic short-distance wireless digital communications technology research on short-distance wireless digital communications technology and there has been no mature chip products. Therefore, it is very meaningful for this resarch on the short-distance wireless communication standard digital baseband chip based on proprietary BPSK.The main works and contributions of the thesis include:(1) This paper outlines the basic theory of BPSK communications, including sampling theorem, multi-rate signal processing and filter basic theory for the design study of the theoretical foundation of communication systems.(2) According to the project requirement, the communication system is designed and studied from the overall architecture, the transmitter and receiver system of BPSK wireless communication system is realized, and the RTL implementation of each module is described in detail. BPSK communication scheme in this paper is that the baseband signal symbol rate is 1Mbps, carrier frequency is 4MHz, sampling frequency is 16 MHz and when SNR is be greater than or equal to 9d B, error rate is less than one thousandth.(3) Since the smapling rate is different between modules, the data needs to go through CIC decimation filter to reduce the sampling rate and it needs to increase the sampling rate of the signal by interpolation. The Verilog code of FIR low-pass filter module and CIC decimation filter module is generated by MATLAB.(4) In order to reduce the error rate, a communication system designed in this paper uses a correlator, peak detection, frequency offset correction and Hamming parity modules. Correlator module m sequence to generate a correlation peak, then the peak detection module detects the correlation peak to find the starting location of the data. Offset corrected by the numerical relationship between the two correlation peaks to calculate the angle deviation obtained without offset of the baseband signal. Hamming check module can detect a data error, the system can further reduce the error rate.(5) This design system was verified. Use Modelsim for FIR low-pass filter, CIC decimation filter and a Hamming checksum function simulation and other modules. Altera Quartus II and the use of company's Cyclone IV FPGA chip for data transmission communication systems for the overall test.
Keywords/Search Tags:phase shift keying, the short-range communications, filter, FPGA, synchronous demodulation, Hamming check
PDF Full Text Request
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