Research And Realization Of Hardware/software Partitioning Algorithm Based On Shuffled Frog Leap Algorithm

With the rapid development of the application of multi-core on a chip all over the world, the hardware/software partitioning has growing influence upon the final embedded design scheme, as a vital technology of hardware/software co-design. Apparently, the hardware/software partitioning includes processor partitioning and task scheduling. It also can be divided into two categories: the single-objective partitioning and the multi-objective partitioning depending on the different types of the objective function. Shuffled frog leaping algorithm(SFLA), as an emerging artificial intelligence optimization algorithm with high accuracy and a rapid convergence rate, is adequate to solving the hardware/software partitioning problem. Thus, based on SFLA, this article studies the hardware/software partition in depth, the contents of which mainly consists of four aspects as follows:Firstly, a review concentrating on the hardware/software partitioning and relative theories is proposed, while summarizing all kinds of concepts and theories of hardware/software partitioning models. In this sector, a new type of hardware/software partitioning model is put forward. Simultaneously, this section has carried on the theory retrospect of combinatorial optimization algorithms and analyzes the research process and the main research train of thought by comparing the advantages and disadvantages among different kinds of artificial intelligence optimization algorithms.Secondly, a constructive partitioning algorithm based on SFLA for single-objective partitioning is studied according to the features of existing research on the single-objective partitioning and SFLA. Then the improvements of the heuristic algorithm considering the disadvantages when SFLA is applied to solving hardware/software partitioning are discussed. A contrast experiment between the proposed algorithm and other artificial intelligence optimization algorithms is made, which confirms the high accuracy and efficiency of this algorithm.Thirdly, the task scheduling algorithm is discussed in this section, which focuses on the storage capacity of communication among cores and processors. A maximum D-value first algorithm is proposed by improving the hardware parallelism in the task execution process and the maximum storage requirements for communication. The contrast experimental result with various directed acyclic graph(DAG) models shows that storage requirements for communication in the new algorithm is reduced a lot on average, while the average of makespan is just increased slightly compared with the earliest task first(ETF) algorithm.Finally, a multi-objective hardware/software partitioning algorithm based on SFLA is proposed, which combines Pareto methodology, aims at embedded system target structure and considers storage requirements for communication and system power. A contrast experiment is made by reviewing the basic concept of Pareto multi-objective optimization algorithms and their relevant theories. The high accuracy and efficiency of the proposed algorithm is confirmed at last.