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Research And Implement Of The Extraction Algorithm Of Signals With Large Dynamic Range And Low-SNR

Posted on:2017-02-02Degree:MasterType:Thesis
Country:ChinaCandidate:R X BaiFull Text:PDF
GTID:2308330503964300Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Signal processing algorithm is one of the key technologies of Laser Doppler velocity radar. According to project requirements,namely, 1) the SNR of input signal is-30 d B; 2)measurement range is-20m/s~70m/s; 3) complete 3 channels of frequency extraction within 100ms; 4)measurable precision≤1cm/s, A signal processing algorithm, which combines Fast Fourier Transform、Frequence domain accumulating and Spectrum Correction Algorithm is introduced after in-depth research, and further validation based on MATLAB is finished.On the Xilinx ISE 14.5 platform, Obiect FPGA device XC4VSX-10FF1148 I, containsing 512 DSPs、320 Block Rams、24576 Slices、8DCMs and about 5.5 million gates, is selected. Codes of the 8192 single-precision floating-point FFT of Order recursive structure(operating frequency of 125.881MHz) are written by using Verilog HDL, and downloaded verification is finished. According to analysis of device resource consumption, if there’s a high speed cache to save the original data, two parallel FFT processor running at the frequence of 125 MHz can be integrated in device, this algorithm is able to process 180 times of FFT and 20 times of single-channel autocorrelation accumulation in frequence domain within 44.34 ms, meeting the requirements of task mission assignment, however, due to technical limition of lacking high-speed memories, this structure does not finish the frequence domain accumulation algorithm.After the study of signal processing algorithms, the pipeline autocorrelation accumulation algorithm is put forward. 8192 fixed-points pipelined FFT and 20 times of fixed-points frequence domain accumulation algorithm, which consumes 9415 Slices(38%)、311 DSP48(60%)、116 Block Ram(36%),operates at the maximum frequency of 167 MHz, are completed. Simulation results show that signal processing algorithm run at the frequence of 125 MHz, and needs 0.1ms to complete the frequence domain accumulation algorithm after datas are sampled, having strong real time quality. It can adapt to the applications of full continuous emission laser 、continuous data sampling and algorithms processing. The ability of signal extraction is greatly improved, prolonging the detection range of Laser Doppler velocity Radar.Finally, low SNR extraction experiment is conducted on the self-developed signal processing board, integrating high-speed device ADS5463, which has 12 bits parallel output, and a maximum operating frequency of 500 MHz, real environment operating frequency of 250 MHz, 20 times of pipeline frequence domain accumulation algorithm and experimental scheme using signals containing input signals and noise signals are applied to conduct the low SNR extraction experiment.Experiment results show that this algorithm can extract signals with the SNR of-31.72 d B stably, achieving the velocity precision of 1.1625 cm / s.
Keywords/Search Tags:Laser Doppler velocity Radar, Large dynamic range, Low SNR, Pipeline, FFT, FPGA, Frequence domain accumulating algorithm
PDF Full Text Request
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