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Research On LDPC Error Correcting Codes Technology For Nand Flash Memory Systems

Posted on:2017-04-02Degree:MasterType:Thesis
Country:ChinaCandidate:H F WuFull Text:PDF
GTID:2308330503487144Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
Flash memory systems always suffer from bit errors due to various interferences in use, so it is necessary to introduce error correcting codes(ECC) to ensure the reliability of the data. LDPC(Low Density Parity Check) code is a kind of linear block error correcting code, which has an outstanding error correcting performance near Shannon limit. It has received more and more attention from researchers. However, the LDPC decoding complexity is high, and decoding time consuming is very serious. These become the bottleneck of its application in flash memory system.To handle to the above-mentioned practical problems, this paper studied the basic theory of the physical characteristics of flash memory system and LDPC codes, and proposed a method to obtain high precision soft information with slight overhead. The presented method improves the performance of LDPC decoder, and the optimization method is extended from the binary LDPC code to non-binary LDPC codes. The main contents of this paper and the results are as follows.1、Research on LDPC code principle and parameter design. The principle of LDPC code includes matrix construction algorithm, encoding algorithm and decoding algorithm, and each module there are a variety of different algorithms implementation. A flash memory system has limitations for ECCs due to its special physical characteristics, such as fixed page width, high code rate, high throughput. This paper implements the simulations of LDPC code in MATLAB. The parameters are redesigned based on the existing algorithms, to meet the practical requirements of the flash memory system.2、Proposing the joint decoding strategy. Efficiency of LDPC code’s iterative decoding process depends on the accuracy of soft information. The conventional methods of obtaining soft information bring severe overhead. During summarizing the retention error data, the patterns of bit flips in MLC flash cell are discovered. According to these patterns, the bit-granularity bit error rate(BBER) can be calculated based on the raw bit error rate. The BBER can accelerate convergence of the LDPC decoder iteration, and make a reduction of time-consuming of decoding process, meanwhile enhance the error correction capability. The joint decoding strategy is tested in the controlled experiments against binary LDPC code. The experimental results verify that the proposed strategy can improve time efficiency and error correction capability of binary LDPC codes. And the corresponding C language programs are also complete.3、Research on the non-binary LDPC code for flash memory system. Non-binary LDPC code is an extension of the binary LDPC code in higher order finite field GF(q), which has been proved to have stronger error correcting capability than the binary LDPC code, but the decoding complexity of the non-binary LDPC code is also higher than that of the binary LDPC code. In this paper, based on the simulation of the nonbinary LDPC code, the joint decoding scheme is applied to the non-binary LDPC code, and the decoding efficiency of the non-binary LDPC code is improved. The effect of proposed strategy is verified by controlled experiments implemented on GF(8) LDPC code.
Keywords/Search Tags:Flash Memory System, Error Correcting Code, Non-binary LDPC Code, Matrix Construction, Decoding Algorithm
PDF Full Text Request
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