Design Of 100MHz Analog Baseband Chain For Broadband Wireless Communication

The quality of our life has been significantly improved by rapid development of mobile communication technology. Coming together, the increasing requirements for data communications, which is especially important in today’s rapidly developing communication technology, can greatly benefit from increasing bandwidth, which can directly realize high-speed data transmission.This article designed an analog baseband(ABB) circuit chip for receiver in broadband wireless communication system, and gain adjustment, out-band signal rejection and DC offset cancellation can be implemented. The circuit mainly includes 3 parts according to its function:broadband programmable gain amplifier(PGA), high cut-off frequency low-pass filter(LPF) and DC offset cancellation(DCOC) circuit.The article starts with the basic architecture of zero-IF receiver, then the role of ABB circuit in wireless communication receiver is analyzed and detailed design specifications are introduced. Subsequently, according to the design requirements of wideband receiver, and taking the noise and linearity in cascade into account, the system scheme of ABB circuit is determined and the appropriate circuit structures are selected to achieve the corresponding modules.The PGA is based on programmable source and load resistance, using four cascaded structure to complete 60dB gain adjustment range, with the first three to gain coarse adjustment, and the final level to gain fine adjustment A series of linearity optimization techniques are adopted in PGA and the accurate gain is realized by the way of resistance ratio. DC offset voltage exists in Zero-IF receiver which will affect the operating point, in this design, DC offset cancellation is accomplished in analog manner, by adding a low pass negative feedback on the PGA circuit. Two DCOC circuits are implemented, taking power consumption and layout area into account, and each corresponds to two PGAs.LPF uses Gm-C structure to improve the cutoff frequency in order to meet the broadband design requirement.6-order Chebyshev low-pass filter is used as prototype and the large out-band rejection is achieved at the expense of in-band flatness. LPF is designed with the idea of element replacement, active resistance and inductance, respectively, instead of the corresponding passive components. In the actual design, filter performance will be influenced by non-ideal characteristics of transconductance so it needs to consider the LPF performance comprehensively to put forward reasonable transconductance unit design.The design is completed using TSMC 130nm CMOS process, and all the circuits were verified through post simulation. The circuit can realize gain adjustment of 60dB with ldB gain step, the bandwidth is adjustable within 100-200MHz, and the adjacent channel rejection ratio is more than 38dB. The noise figure is 19.2dB and IIP3 is-43.1dBm in the maximum gain. DCOC cutoff frequency is 1.2MHz, the power consumption is 32.2mW at 1.2V supply voltage power. According to post-simulation results, the circuit indicators meet the design requirements of analog baseband circuit for broadband system.