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The Design Of Image Compression And Transmission System For 500fps CMOS Camera

Posted on:2014-04-09Degree:MasterType:Thesis
Country:ChinaCandidate:E Y YaoFull Text:PDF
GTID:2308330482462729Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
The rapid development of modern aerospace and defense technology brings higher requirements to test technology.Weapon system test platform and instrumentation system needs the system performance test under the real condition, real-time information record and remote monitoring.Due to the high frame rate camera can test object and background image of visual information, it has important application value in the area of military, national defense and scientific research. A high frame rate camera has been designed in the background of a certain type of missile launchers position attitude for video image acquisition system. The camera is hard to transmit and save the huge number of image data in high frame camera system. In order to solve this problem, the image compression technology has been applied into the data collection and record system.The research includes the following contents:The LeGall5/3 lifting wavelet transform hardware circuit is designed with the language of Verilog on the software platform of QuartusII. Hardware circuit is approved available by comparing the former images with the images which inverse transformed by the Matlab.The existing coding algorithm has the problems of computationally intensive, complicated structure and high requirement of cache.It is hard to work in a parallel mode on the FPGA chip, so a new automatic coding algorithm which based on the EZW and the SPIHT has been proposed in this paper. Five new coding formats are proposed in this paper.The new algorithm choose the suitable coding format automatically to code wavelet coefficient by comparing wavelet coefficient. The listless code could be realized quickly through the new algorithm.In order to meet the demand of long-distance transmission for high frame frequency camera, the UDP transmission protocol with high speed and simple transmission mode has been designed. A transmission circuit based on FPGA has been designed to achieve the purposes of high speed image information remote transmission.And the SATA2.0 interface circuit has been designed with SSD as a storage medium.It is effectively to solve the real-time storage for high frame rate camera’s image information.At last, theoretically analysis and experimentally test have been completed to the whole system.The result shows that this system could Lossless compress the image with the compression ratio of 6:1. It meets the demand of compression record of 500fps in a stable and reliable operation condition.
Keywords/Search Tags:FPGA, 500fps, CMOS image sensor, image compression, Le Gall 5/3 wavelet transform, image coding, Image transmission
PDF Full Text Request
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