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Signal Integrity Analysis Of DDR3 And Application In IMX6 Circuit

Posted on:2016-11-29Degree:MasterType:Thesis
Country:ChinaCandidate:X H LiFull Text:PDF
GTID:2308330479993958Subject:Control theory and control engineering
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The development of modern electronic technology with each passing day. Starting in the 1960’s, the development of the integrated circuit in accordance with Moore’s Law, every 18 months, doubling the number of transistors that can accommodate, and the performance of integrated circuit also doubled. As the performance continues to improve, the internal frequency of integrated circuits increasingly high,slice the bus frequency outside of chip. Continuously improve the onboard signal frequency, signal integrity has brought many problems to the circuit design, such asReflection,Crosstalk, Ringing, etc.Signal integrity issues in high-speed circuit, brings many challenges to the circuit design. The unreasonable design and choice of the length of transmission line, impedance, printed circuit board and chip package, will have an impact on the high speed signal, make noise in the signal, resulting in signal distortion. In this paper, we analysis signal integrity problems in the design of DDR3, especially corner impedance mutation, via capacitive load, delay lines and components package, and puts forward the solving methods. Different wiring topology structure of DDR3 have different effects, and applied in different occasions and signal frequency. Various topologies of DDR3 routing are detailed introduction and analyzed in this paper, especially the T topology, daisy chain topology and Fly-by topology. These three kinds of topology are for the address/clock/control signal routing topology, the advantages and disadvantages of the three kinds of topological structure of the lGHz signal frequency situation is not very clear. In this paper, according to the characteristics and application environment of the topological structure, the construction of the proposed three kinds of topology should be used under what conditions, the DDR3 uses the most suitable topology optimization under different conditions, the performance of the DDR3 signal.This paper introduces Signal Integrity simulation method in circuit design. Different from the traditional design method of circuit, high speed circuit design is very difficult to judge the quality of the signal according to the experience.It is necessary to requires a combination of signal integrity analysis and simulation tools to complete the circuit design. In the PCB routing to signal circuit simulation analysis, until the signal simulation results meet the requirements before the production of the next step. Design method of high speed circuit, not only solve the signal integrity problem, shorten the design cycle of the electronic equipment, effective quality assurance of hardware design and improve the production efficiency.This is a subject on the research of DDR3 operation situation in Freescale processor IMX6 circuit, investigating the problem of signal integrity in DDR3 circuit design. By contrast analysis different topological structure of DDR3, proposed the application occasions of each topology, using simulation method to optimization topology and routing scheme of DDR3, improve the performance and stability of DDR3.
Keywords/Search Tags:Signal integrity analysis, DDR3 memory, high-speed circuit design, simulation
PDF Full Text Request
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