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Single-event-hardened Technique For Charge Cancellation In Folded-cascode Amplifiers

Posted on:2016-05-04Degree:MasterType:Thesis
Country:ChinaCandidate:J X LiFull Text:PDF
GTID:2308330479491363Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the continuous development of the aerospace business, more and more electronic systems have been used in aerospace equipment. But once electronic components have been exposed into the space environment with temperature changing and high radiation intensity, the reliability of devices will inevitably be affected seriously. In the integrated circuit, the shrinking process size, increasing clock frequency and parasitic effect’s influence have made the domestic and foreign research on radiation effects gradually focus on single event transient(SET) in analog circuit.single event transient becomes the greatest contribution to the soft error rate in the single-event effect(SEE). In analog circuits, when a energetic particle strikes a sensitive node of a device, it will produce excess carrier in this device and cause a transient voltage drift at the output of the circuit.Based on the important position the operational amplifier in analog and mixed signal design and the necessity of research on the single event transient(SET), this paper selects the folded-cascode amplifier as the research object, mainly studies the mechanism and sensibility of single event transient(SET). It proposes two methods of charge cancellation respectively for each part of the amplifier and makes some experiments for the analysis and verification of the methods.Firstly, folded-cascode amplifier that conforms to the performance index request is designed under SMIC 0.18μm technology after analysing the mechanism and the influence of the single event transient(SET) in the analog circuit; Then the Technology Computer Aided Design(TCAD) is used to carry out the sensitive nodes of SET in each part of the amplifier. During the process, the MOS device with multidimensional model should be established and then a mixed model simulation of circuit and device level is taken. The critical charge value, transient pulse width of the total output and fluctuation range value are employed for the selection of sensitive nodes; Finally, the paper uses radiation hardened by design to strengthen the sensitive nodes in the amplifier circuit.The M-SNACC technology and DCC layout technology harden the amplifier separately in the level of circuit and layout. The integral hardened layout and the simulation results are given and the performance index changes are analysed and compared before and after the radiation hardened by design.
Keywords/Search Tags:analog circuit, folded-cascode amplifier, SET sensitivity, M-SNACC, DCC
PDF Full Text Request
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