The Software Design Of Six Channels Variable Bandwidth Digital Receiver On FPGA

With the high-speed development of Field Programmable Logic Gate Array(FPGA), the application of FPGA technology also reached an unprecedented height. It not only realize the digital front end and other functions, but is one of the effective carrier to high-efficiency realize the digital system. And since the maturity and perfection of software radio theory, the software radio technology has become one of the key technologies to realize the digital receiver. At present, the implementation of digital receiver on FPGA has become the mainstream design way.With the increasingly complex electromagnetic environment, a digital receiver also faces enormous challenges. This dissertation proposes a scheme of six-channel parallel variable bandwidth digital receiver design on FPGA, the receiver not only can parallel processing multi-channel signals which can processing 7 signals of different bandwidth, but also realize the high-resolution spectrum analysis. Firstly, the dissertation analyzes the scheme and verifies its feasibility in theory. Then it realizes the receiver system in FPGA. Finally, it does test to the the receiver system in hardware plotform. The main content of this dissertation includes the following aspects:1. It tintoduces the related theoretical knowledge of digital receiver, which includes the sognal sampling theory, variable bandwidth digital down conversion theory and spectrum analysis theory. These theories are basis of the theory of software radio.2. It introduces the system design scheme of the digital receiver, and the system uses the modular design method, adopts the way of combination of CIC filter and polyphase filter to design and implement the scheme of variable bandwidth digital down converter.3. It realizes digital frequency spectrum transform to the data of DDC. The points of FFT may change in 64~8192, the design can choose different transformation points for different bandwidth, so the spectrum has high-resolution.4. It uses CORDIC algorithm to complete modulo operation of complex frequency spectrum data. Its operation speed is speed very fast, and the result of operation has very high high precision.5. It does functional simulation in Modelsim sortware to the FPGA design system, it validate the function of each module of the design system is corret.6. At last, it do the board level test to the design system. Through the test, it validate the digital receiver system is meets all design requirements of the scheme.