Research And Implementation Of Spread Spectrum System And Synchronization Technology

Spread spectrum communication technology has a lot of advantages, such as the high performance of concealment, multiple access communication, and resisting interference and multipath fading, so that it has been widely used in civilian and military fields.Synchronization technique is especially important in spread spectrum system. Direct sequence spread spectrum(DSSS) which is the most commonly used spread spectrum technology and its synchronization technique including spreading code synchronization, frame synchronization and carrier synchronization are researched in this thesis. The research background is in line-of-sight environment of low SNR AWGN channel, and signal transmitted is burst data. The main job is embodied in the following three aspects:First of all, this thesis researches the methods of spreading codes acquisition in DSSS communication system, including serial search, parallel search and baseband matched filter. And then studies the carrier synchronization algorithm of the system. Based on the burst data transmitted, carrier acquisition adopts open-loop feed forward method, which uses training sequence to complete quick frequency offset estimation. The frequency offset estimator has two basic methods. One is based on phase difference of adjacent point, and the other is based on autocorrelation function. Carrier tracking adopts phase-locked loop, whose phase discriminator is based on decision-directed algorithm. Simulation platform is set up based on matlab. The simulation results of above algorithm are compared to analyze their performance.Secondly, based on the requirement of project, and taking performance and implementation complexity into consideration, the system synchronization algorithm adopts baseband matched filter, L&R frequency offset estimator and phase-locked loop based on the DD algorithms. Then the design and simulation of the whole system are completed.At last, the whole system’s implementation structure, including transmitter and receiver is proposed in details, and it is implemented by Altera’s Cyclone III series FPGA chip EP3C120F780I7.In the end, its implement correctness is verified by the combination of simulink and modelsim simulation and tests on hardware board.