Digital Interphone Testing Technology And The Implementation On FPGA

Transferring from analog to digital interphone, Digital interphone is applied to units’ dispatching and commanding, group calling, etc for the reason that it meets the needs of the current specialized wireless communication environment, Digital interphone can not only realize the point-to-point and point to multi-point directional communication function, but also achieve the short message. However, the development of all aspects of the interphone industry have important role on the development of the industry, including research, testing, production, etc. Therefore, research on digital Testing system, which not only in favor of Radio related business smoothly, but also have great significance to interphone products’ reasearch technology, quality assuarance and mass production.This subject derives from the digital radio test system based on DPMR(Digital Private Mobile Radio) or DMR(Digital Mobile Radio) or PDT(Police Digital Trunking) protocol. DMR system protocol is an openning digital mobile communication standards which established by the European Telecommunications Standards Institute(ETSI). DPMR is a lowcost digital mobile communication standards which also instituted by ETSI. And DPT, is an introduced professional digital wireless communication technology standard which according to the needs in wireless dispatching communication of public security in China. This thesis is aimed at reaserch on Digital interphone testing system on FPGA, which based on reaserch of interphone protocol, grasp signal gnerated technology and the application of the FPGA Hardware development skills.Digital Radio Testing System mentioned in this thesis can be divided into two modules, the low-frequency board and the digital board. The low-frequency board mainly achieves the functions like human-computer interaction, A/D and D/A conversion etc., while the digital board, aims at the related work of digital signal processing in the testing system in accordance with the protocol, including the codec and modem and so on. This thesis focuses on studying the implementation of digital board in digital intercom test system based DPMR protocol.This thesis firstly introduces the DPMR system protocol, including the protocol hierarchical structure, frame structure, modulation mode and the construction process of each frame. Secondly, it gives a preliminary presentation to the overall framework of the testing system and the signal generation technique. Finally, this thesis discusses the design of the interface involved in the system-DPMR system. The interface is divided into two categories, the external interface used for the communication with low-frequency board and the internal interface existed in digital board itself. The external interfaces include instruction parsing, bidirectional port, A/D and D/A interfaces, while the internal interfaces mainly contain FIFO and dual port RAM. As rational and efficient design and implementation of the interface section is a prerequisite for the proper and orderly work of every functional module, this thesis proposes the entire working process of digital board system, studies the working sequence of each interface in this design and in the meantime, gives the key statements, block diagram and simulation results based on Modelsim of Verilog HDL design, according to the relevant standards and the actual needs of the project. Based on the FPGA of Altera Company, this design, conducts the board-level verification and debugging work and observes the results through Signal Tap in Quartus II developing environment. At present, the board-level verification and alignment in this system have been completed. This thesis introduces in detail the entire process of alignment from the part to the whole, and gives the implementation results. At the same time, the resulting data of Signal Tap are extracted for the simulation in Matlab., Given that the three protocols have the interoperability at the very great extent, the achievements of this research lay a foundation for the implementation of DMR and PDT testing systems in this project.