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Implementation Of Wireless Channel Emulator On FPGA

Posted on:2016-02-28Degree:MasterType:Thesis
Country:ChinaCandidate:Y T WangFull Text:PDF
GTID:2298330467992997Subject:Signal and Information Processing
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With the development of software radio technology, research institutes and radio enthusiasts have a low-cost wireless device development platform, but also lack the low-cost test environment. The main objective of this paper designs a base band radio channel emulator on the programmable gate array FPGA (Field Programmable Gate Array) platform. Implementation of Rayleigh fading channel based on software research has a long history, but implemented in software has slow characteristics, in recent years, with the development of programmable logic devices and improvement of the performance of the hardware simulation tool, Implementation of hardware-based radio channel simulators has a good research platform.Based on the radio channel emulator design, this paper completed the following work. First, conduct a comprehensive research and compare the Gaussian random number generation method. Focus on the Box-Muller algorithm and Wallace algorithm on the FPGA implementation issues. Box-Muller involves sine and cosine, square root, logarithm transcendental functions such as complex computational problems, coordinate rotation digital computation method (Coordinate Rotation Digital Computer) CORDIC method can use shift register on the FPGA to operate cosine, square root of floating-point arithmetic and number. The traditional CORDIC algorithm has some shortcomings in convergence domain and frequency shift, for this shortcoming, this paper improved the domain folding coordinate rotation digital computer algorithms MDF-CORIDC domain CORDIC algorithm and improved algorithm to improve the convergence precision arithmetic degrees. In same iteration times, the traditional CORDIC algorithm accuracy is10-3, precision improved after CORDIC algorithm and becomes10-7. Secondly, Wallace algorithm although does not involve complex calculations for hardware implementations, but there is a correlation between the Gaussian random number generated by the initial value. Base on their respective advantages and disadvantages for the Box-Muller algorithm and Wallace, the paper will use Gaussian random number generated by Box-Muller algorithm to update Wallace source data pool, which can reduce the algorithm Wallace correlation. Finally, make the Gaussian random number through a low-pass filter which obeys Jakes spectrum characteristic to obtain Rayleigh fading coefficient enabling Rayleigh fading channels.
Keywords/Search Tags:Rayleigh fading channel, FPGA (Field ProgrammableGate Array), Box-Muller algorithm, Wallace algorithm, CORDIC(Coordinate Rotation Digital Computer)
PDF Full Text Request
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