Research On Heterostructure Of GaAs/Si Applied In Optoelectronic Integrated Microsystem

How to integrate heterojunction semiconductor materials with different photoelectron characteristics to provide the substrates for optoelectronic and microelectronic integration, especially through integrate III-V semiconductor materials represented by GaAs and InP with Si by the method of large mismatch heteroepitaxy, have become the most significant research. In this thesis, a great deal of work is demonstrated about theoretical and experimental research on heteroepitaxy of GaAs on Si substrates by using a thin Si film as buffer layer and inserting InGaAs/GaAs SLS into the GaAs epilayer. The heteroepitaxy equipment is metalorganic chemical vapor deposition in our laboratory. The main contents and achievements are as follows.1. Based on the conventional two-step growth, we adapt a thin Si film as buffer layer for GaAs/Si heteroepitaxy. At first of all, two-step growth was employed for heteroepitaxial growth of GaAs on the Si substrates. At this case, the full width at half maximum (FWHM) of the x-ray (004) rocking curve for the sample was399arcsec and the root mean square (RMS) roughness of the sample within the range of lμm×1μm is1.5nm. Then we adapt a new technique for growing high-quality GaAs on Si substrate. The process involves deposition of a thin amorphous Si film prior to the conventional two-step growth. After the adjustment of the conditions for the deposition of amorphous Si, we adapt3%SiH4with the flow of78ml/min to deposit5min on the Si substrates at620℃. The GaAs layers grown on Si by this technique exhibit a better surface morphology and higher crystallinity as compared to the sample grown by conventional two-step method. The FWHM of the sample was385arcsec and the RMS roughness of the sample within the range of1μm×1μm is1.2nm. 2. High-quality GaAs epilayers on Si substrates have been obtained by using a thin Si film as buffer layer combined with thermal cycle annealing. After the adjustment of the conditions for the deposition of amorphous Si, we grew the GaAs epilayer to1.8μm and combined with a three-period cycle annealing. The sample was heated to750℃and stabilized for5min, and then cooled to350℃and stabilized for6min in each cycle annealing and this process was repeated three times. The FWHM of the sample was183arcsec and the RMS roughness of the sample within the range of1μm×1μm is0.5nm.3. Based on three-step growth, we inserted InGaAs/GaAs SLS into the GaAs epilayer to resist the threading dislocation density in the GaAs layer on the Si substrate. Three-step growth was employed for heteroepitaxial growth of GaAs on the Si substrates. At this time, the FWHM of the sample was288arcsec and the RMS roughness of the sample within the range of10μm×10μm is2.4nm. And then, based on three-step growth, we have used InGaAs/GaAs SLS grown on GaAs/Si. The thickness, cycle number and In components of InGaAs/GaAs SLS and the location inserted into the epitaxial GaAs layers were analyzed and adjusted. And we obtained an optimized value. After this, we inserted a ten-period-In0.15Ga0.85As/GaAs (11nm/12nm) SLS into the epitaxial GaAs layer at0.7μm. The FWHM of the sample was287arcsec and the RMS roughness of the sample within the range of10μm×10μm is2.4nm.4. High-quality GaAs epilayers on Si substrates have been obtained by insertion of InGaAs/GaAs SLS combined with thermal cycle annealing. Before insertion of a ten-period-ln0.15Ga0.85As/GaAs (llnm/12nm) SLS layer, a three-period cycle annealing (TCA) was performed during the growth of GaAs at1μm. It was found that the effect of SLS’s on dislocation reduction was more enhanced by combining with the TCA process than the effect when SLS’s were used by themselves.The FWHM of the sample was235arcsec and the RMS roughness of the sample within the range of10μm×10μm is2.4nm.