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The Design Of Frequency Synthesizer Circuit For100kHz~3000MHz Monitoring Receiver

Posted on:2014-04-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y F CaiFull Text:PDF
GTID:2268330425476830Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
Frequency synthesis technology is the main signal source of modern RF/microwavesystems. Frequency synthesizer is the hardcore of every wireless system, such as Frequency-Hopping radio, Frequency agile radar and mobile communication. Frequency synthesizer isan important part of broadband receiver,it provides high performance reference source andlocal frequency, determines the quality of whole system.This paper first introduces the basic principle of the frequency synthesis, includingdirect frequency synthesizer, phase-locked loop frequency synthesizer, direct digitalfrequency synthesizer, and analysis of main performance index, then combines with theongoing development of100kHz~3000MHz spectrum monitoring receiver channel makes ascheme selection,and proposes the advantages of both DDS and PLL、technical requirementsof the machine, determines the choice of a HF band frequency coverage scheme,100kHz~30MHz adopts DDS to realize the receiving frequency, VHF/UHF frequency bandusing DDS incentive PLL realize local oscillator frequency, so that the machine can completethe wide frequency band, small step, fast frequency sweep work. Finally, the paper putsforward the frequency synthesizer circuit detailed design and implementation process,through the debugging work have some problems and actual test results on frequencysynthesizer designed to give some summary, especially in the electromagnetic compatibility,such as circuit layout, shielding, power filter, etc.
Keywords/Search Tags:Monitoring receiver, Frequency synthesis, PLL, DDS, Phase noise
PDF Full Text Request
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