Research On Task Mapping And Scheduling Algorithm Considering Latency Model

As IT is advanced, the complexity of integrated circuits on the research ofon-chip interconnection architectures is increased. Recently, Network on Chip(NoC)is regarded as the best reliable interconnect methodology for huge scale integratedCircuits(ICs) such as a System on Chip(SoC) system with manycore. It is reusability,scalability, extensible and expectable. But In NoC technology because of variouselements of blocking traffic, whole latency time is mounted up whileinterconnecting between each devices Scheduled and mapped on the Cores of Chip.Finally, the essential thing is to need the accurate model of calculating latency time.If it is realized, it will be easy to compare the performance of many routingalgorithms for mesh based packet switching NoCs and to find out the optimizedrouting algorithm that make the latency time decrease. In this paper, we used theQueuing theory based on M/G/1to modeling the latency model on NoCs, proposedthe Scheduling and Mapping algorithm to compare between the simulation resultand analysis result。We use a2D mesh topology tailored for processor-memory communication, allresults here are deterministic and adapted traditional XY routing Algorithm which isthe way interconnect data from source core to destination core. The most importantmathematical factor in Queuing system is the injection rate from the source corewhere generate the arrival rate. Then, the whole formula execute at the same timethrough the possibility of passed via router or not. Probably, some of traffic willwait for the vacancy space occupied by other traffic on the same router. Thus, that isthe point we calculate the latency time in order to consider blocking time broughtthe whole latency time much longer and longer.Obviously, latency model has to be used by directly adopting the mapping andscheduling Algorithm in order to confirm whether it would be better or not. Herehave the latency model based on the traditional method and realized and test in Cprogramming language. Finally, the result using the latency model is better methodthan the traditional way to verify latency time with reality.