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Design Of The Area CCD Imaging Acquisition System Based On FPGA

Posted on:2014-04-04Degree:MasterType:Thesis
Country:ChinaCandidate:J Z YangFull Text:PDF
GTID:2268330401965963Subject:Optical Engineering
Abstract/Summary:PDF Full Text Request
As one of the most important parts of the Machine Vision System, industrialcamera not only chosen in consider of its suitable for the environment and function, butthe ratio of cost in the budget. Based on the requirement of the trend of the laboratoryequipment miniaturization and economization, this paper describes the design of a CCDindustrial camera applied to Machine Vision System.This dissertation paper firstly provides a brief introduction of the research statusand tendency of Machine Vision System at home and abroad, then had an overview ofCCD image sensor operate principle and main characteristic parameters, contrast twokind of interpolation algorithm. According to the above analysis, a solution of imageacquisition system based on FPGA had been put forward. The key point of the subject is:1. Understand the Drive timing of CCD sensor, to product the pulse through FPGA;2.Implement data pipeline operation and Bayer decode, image real-time display.Design part of this dissertation consist two main modules: the hardware platform,Verilog programming. The hardware platform implemented by two merged PCB, the topis a double-layered PCB contains CCD, and below it plugs a four-layered PCB containsFPGA/AD/SRAM/CameraLink and theirs peripheral circuit. The select of chips andPCB layout determine system economization and miniaturization. Verilog is kind ofhardware description language, in this dissertation we need to accomplish the control ofthe following module: CCD drive timing, AD register configuration, pipeline memory,Bayer decode and interface transmission. Contribute the FPGA chip would implementthe logic circuit within itself, HDL programming is very flexible.At the last of this dissertation, project goals are met. Probe test CCD sensor’s pinsthrough oscilloscope, the result show that the light signal is collected correctly. Analyzethe data transmitted to PC and debug the HDL program, system produce hi-qualityimage.
Keywords/Search Tags:Area CCD, FPGA, Linear Interpolation, Image Capture
PDF Full Text Request
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