System Modeling And Research Of Timing Control Circuit For TDI CMOS Image Sensor In Digital Domain

Time delay integration (TDI) refers to that the moving objects are exposedrepeatedly and exposure results are accumulated. The total exposure time isequivalently increased and the effect of response nonuniformity and fixed patternnoise is reduced. Signal to noise ratio and sensitivity of the image sensor are increased,so that it is able to achieve high resolution images in low illumination conditions. TDItechnology is widely used in the aviation remote sensing, medical imaging and otherfields. In this thesis,128-stage digital accumulation scheme in TDI CMOS imagesensor was verified through system modeling and the timing control circuit wasresearched.This thesis introduced the principle of TDI CMOS image sensor and analyzedthe characteristics of global shutter and rolling shutter. Combined correlated doublesampling with oversample rolling shutter, readout noise was reduced and signal wasacquired synchronously. The relationship between sensor scanning speed and pixelsize was analyzed, and effect on system modulation transfer function caused byintegration and sampling, and speed mismatch. Compared with the condition ofvoltage saturation in analog integrating circuit, the method of accumulation in digitaldomain after quantization made full use of ADC quantization range. After modelingfor pixels, analog-to-digital converter and accumulation circuit in TDI CMOS imagesensor with Verilog-A and Verilog HDL, the feasibility of digital accumulationscheme was verified with timing control circuit simulation. Structure of the cirsuitswas designed and optimized according to TDI algorithm in digital domain and chiparea was decreased by sharing the adder for each column. The influence of loads in512columns on bus of timing control was observed through simulation. Color filterswere placed on the pixel arrays where red, green and blue ones were a group, and thecircuit constructure and the timing control modules were modified for TDI CMOSimage sensors to get true color images in RGB pattern.In this thesis the function of the circuits was verified by mixed signal simulation.Logic synthesis, placement and routing, static timing analysis and physicalverification for timing control circuits were completed, and the chip was taped out inthe process of GSMC0.18m. The system clock is40M, and the stage ofaccumulation circuit is adjustable from1to129. The line time is also adjustable for34m or258s. Layout area of the accumulation circuit for each column is30m6023m, and that for timing control circuit is116m5200m.