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Research Of Broadening Visual Dynamic Range Of Surveillance Video Monitoring Based On FPGA

Posted on:2013-12-20Degree:MasterType:Thesis
Country:ChinaCandidate:M SunFull Text:PDF
GTID:2268330392469184Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of society, the security problems have aroused widespread concern. The research of the high-definition real-time monitoring system has become a very popular area. These years, with the rapid development of the semiconductor industry, the FPGA has been widely used in a growing number in this field, especially in the video processing system; the FPGA played a very important role in the new theory and the actual system verification.According to a class of problems which often encountered in the high definition real-time security monitoring scenario, the data dynamic range of the monitoring scenes is wide, but the visual dynamic rang is rather small, as this we can’t access to good quality pictures. As this situation, we have to research and proposed good solutions. The design of this system is mainly have two aspects of the image processing:the first step is image acquisition segment, according to the human visual characteristic we use log-mapping on the FPGA chip in order to obtain high dynamic rang monitoring scene; the second part is the image pre-processing aspects in which we apply the halftone histogram equalization algorithm to broadening the visual dynamic range of monitor images, and then we use the improved median filtering method to deal with the noises which enhanced in the dark areas. As the simulation by the software, the design of this system can obtain improved visual dynamic range of the monitor screen, and the details of monitor screen can be good showed.As we know, FPGA has parallel structure in physic, and this is PC and DSP far behind in deal with high-speed processing of huge amount of data. The system includes a log-mapping module, halftone histogram module and filter modules, each module is achieved by the verilog, and the synthesis by the Diamond. After layout and synthesis, from the simulation results, we can know the FPGA chip can well meet the requirements. And this monitoring system has good practical value.
Keywords/Search Tags:Visual dynamic range broaden, real-time, log-mapping, Halftone histogramequalization, Median filter, FPGA
PDF Full Text Request
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