A Design Of High Dynamic Range Digital AGC Circuit Applied To Wireless Receiver

In the early years of radio circuits，fading required continuing adjustments in thereceiver’s in order to maintain a relative constant output signal. Such situation led to thedesign of circuits which primary ideal function was to maintain a constant signal levelat the output, regardless of the signal’s variations at the input of the system. Originally,those circuits were described as automatic volume control circuits, a few years later theywere generalized under the name of Automatic Gain Control (AGC) circuits. The majorcomponent of AGC is a variable gain amplifier whose gain can be dynamically variedby a feedback control signal. Thus, a VGA is an indispensable function block for allradio communication systems.By now, AGC systems can be divided into two types, the analog AGC and thedigital AGC. The analog AGC systems’ gain is changed through the feedback of analogcircuits. Thus the requirement of the analog circuits is very high, we must make acompromise between the stability of the system, power consumption，area and so on.Besides, in order to maintain constant settling time with different input signal amplitudein automatic gain control (AGC) loop, the gain of VGA should have exponential gaincharacteristic. Due to the square-law characteristics of CMOS technology, it is difficultto generate an exponential gain only base on VGA itself, so we need an extra circuit togenerate the exponential signal to control the gain, and this improve the difficulty of thedesign. While in the digital AGC (DAGC) system, we just need a VGA circuit, thecontrolling signal can be generated by the DSP. Then, we can decrease the difficulty ofthe design of the circuit.The proposed AGC in this project is a typical digital AGC whose gain iscontrolled by five digital codes. The VGA circuit is cascaded by6amplifiers. The gaincontrol range of the proposed VGA can be50dB with the linearity error less than±0.2dB, and the bandwidth is more than100MHz. The proposed AGC is implementedin TSMC0.18μm MOS technology. For the case of supply voltages VDD=1.8V, thecurrent consumption is less than2mW.