Study Of Thermal Analysis Method In Chip Stacking

Stacked assembly technology has the characteristics of high density, shortinterconnect lines, small size, light weight, good performance. In particular, the limits ofvolume and weight of electronic devices in aviation and aerospace reflects thesuperiority of stacked assembly technology. But with the chip integration and theincreasing power density, power consumption per unit volume is increasing. This leadsincreasing heat and rapid temperature rise, thus reinforcing the interaction ofmechanical, chemical, electrical and other aspects formed by thermal and reducing thechip performance and reliability. Failure rate of components has exponentialrelationship with the node temperature. The performance decreases with increasingtemperature. So it is very necessary to have stacked chip thermal analysis.Finite element method and the thermal network method are used in this paper toanalysis thermal in stacked chip. This paper analysis the materials, size of stacked chipsand thermal conductivity and the coefficient of heat transfer. The method of buildinggeometric model and dividing mesh is proposed in this paper. It determined theboundary conditions of stacked chip and had analog simulation with finite elementmethod. The five conclusions drawn from experiments show that the finite elementmodel created in this paper accurately reflects the thermal distribution of stacked chips.Secondly, this paper discreted the temperature field of stacked chip to grid with theguidance of the basic theory of the thermal network method and form a heat network bysimulating circuit. The thermal field is transformed into electric field. Thermalequilibrium matrix equation is derived. Using Gauss—Seidel iterative method forsolving matrix equations. Experimental data show that the stacked chip thermal networkmodel is reasonable and the thermal balance equation is correct.The following work is stacked chip thermal design. It will lower the impact oftemperature on product reliability through component selection, circuit design,structural design and rational distribution. The stacked chip could work over a widetemperature range.