Soft-Input Soft-Output MMIMO Detection Algorithm And VLSI Architecture

Compared with single antenna system, multiple-input andmultiple-output (MIMO) wireless communication system is capable ofproviding much higher data rates or link reliability without additionalbandwidth or increased transmit power. MIMO technology has become thehot spot of communication system in recent years. The complexity ofsignal detection and detection performance at the receiver are veryimportant for the application of MIMO system. By exchanging softinformation between the MIMO detector and the channel decoder, aniterative receiver can significantly improve the performance at the cost ofmuch higher complexity and lower throughput compared withnon-iterative schemes. Therefore, it is of great importance to develop ahigh speed iterative detector with good detection performance to meet theincreasing demand for bandwidth of the future wireless communication.This thesis proposes the VLSI architecture and implementation for a4×464-QAM soft-input soft-output MIMO detector based on the fixedcomplexity sphere decoding algorithm (FSD), taking area, throughput anddetection performance into account. At the algorithm level, the minimummean square error smart ordered QR decomposition (MMSE-SOQRD)preprocessing method is adopted to improve the detection performance. Atthe same time, the algorithm employs the parallel candidate adding schemeto improve the quality of the soft information. In order to reduce thecomputational complexity, the hybrid enumeration and theimbalanced-expansion scheme is applied, which reduce the number ofvisited nodes significantly. At the Very Large Scale Integrated (VLSI)architecture level, the proposed multistage architecture using time-multiplexing hardware sharing fashion further reduces the area cost.Simulation results show that the proposed soft-input soft-outputMIMO detection algorithm can achieve near optimal detectionperformance, while maintaining relatively low complexity. Implementedusing the90nm CMOS technology, the detector can achieve a maximumthroughput of2.2Gbps with an area efficiency of3.96Mbps/kG. This worktakes advantage on both area efficiency and throughput compared withother soft-input and soft-output MIMO detectors, and achieves theminimum latency of0.1μs, which lays the foundation for application of thenext generation Gbps soft-input soft-output MIMO detector.