Ip Protocol Translation Controller Research And Implement Based On Fpga

As the widely usage of programmable logic device, HDLC procedures can be implemented in FPGA. By adopting hard-ware processing technology FPGA devices can be programmed repeatedly. Considering speed and flexibility, FPGA can be used to process multi-channel signals in parallel, and the real-time capacity is predictable and able to be simulated. So, using FPGA to replace ASIC devices for HDLC imple-mentation is a proper choice. Some companies, such as Xilinx have brought out IP (Intellectual Property) Cores to implement HDLC procedures in FPGA. Instead of using these IP Cores which require purchasing licenses, in this paper, we propose a method of HDLC implementation based on FPGAby using Verilog HDL.Based on HDLC implementation above, in this paper, we proposed a realization method of IP protocol translation controller based on FPGA. On the whole process of design, and on the implementation of bottom of the specific modules, we complete the specific coding algorithm and implementation. Finally we have used the Xilinx software ISE10.1SP3development environment coding. And have verified in the ISE Simulator simulation. In the end, we have completed the whole system performance test and result analysis. The main work is the following:1. I access to relevant information, and understand of the research topic research status at home and abroad.2. TCP/UDP, IPv4, IPv6, HDLC and Xilinx FPGA were studied, and we put forward the whole scheme.3. In the development environment of ISE10.1SP3, Through the Verilog HDL and the FSM design, we realize the HDLC controller. To realize IP protocol conversion controller input and output module4. In the development environment of ISE10.1SP3, based on HDLC controller, we design of IPv4/IPv6address and protocol conversion of the overall process, use the Verilog HDL and IP core coding realize the refinement of the functional module. And finally use the ISE Simulator software for the simulation, to get the desired results.5. We test and results analysis by the resource consumption of the system, the processing efficiency and scalability on several aspects of the whole system. It proves that this system has a certain practical value.