Broadband Signal Acquisition System Of Optical Fiber Data Transceiver Module Design

The development of high-speed and large-capacity signal acquisition technology, make data transfer capabilities of the system highlights the position in which slowly. Many specific applications, like real-time requirements or deep storage requirements, such as radar, sonar, image processing, speech recognition, geological exploration, optical time domain reflection measurements, etc.,often require high-speed or ultra-high-speed data acquisition system. High-speed data transmission is particularly important at this point, so how to send and receive data fast and accurately has become a crucial direction of the data acquisition system.When select the transmission medium, the optical fiber has been widely used because of its so many advantages, such as low attenuation, long distance relay, frequency bandwidth, free from electromagnetic signals induction interference, the performance of confidentiality. In order to ensure data can be received accurately during transmission, not only at the physical layer, in the sending and receiving end also need to develop the same transport protocol to ensure data integrity and accuracy.The paper developed the structure of the transmission system based on the actual situation of the project including the monitoring of the data prior to transmission,data flow control, the realization of high-speed transmission. After the analysis of the selection of the hardware, the hardware system are completed and debugged. The subsequent sections describe the high-speed serial transfer protocol, give details of the Fibre Channel frame structure and interactive way and illustrate the structure of FPGA-specific high-speed transceiver IPcore, principle and configuration instructions. On the basis of the Fibre Channel frames and the signaling protocol, and according to the actual system requirements, the paper achieve a sustained transfer program based on the Fibre Channel protocol data. This transmission scheme has been implemented with FPGA and its simulation of the function has been tested.Finally, the whole system testing process are described and test results are analyzed in this paper, which can verify the system design, and then we also discusses the deficiencies and areas which need to improve in the paper.