Pxi High-speed Data Acquisition Module

Along with the development of PXI bus technology, data acquisition system can collect data transmission to the PC with the help of the PXI bus and it can complete signal processing with the powerful operation ability of the CPU. In the market, high-speed data acquisition products based on PXI interface are getting more and more attention for its unique advantage.The standard of the FMC (FPGA Mezzanine Cards) puts forward to provide standard sandwich card norms and module interface for the based board (carrier card) of the FPGA,so the loading board which is based on the FPGA can expand different I/O.In this way, it can separate the I/O interface and FPGA,it is not only simplify the I/O interface module design,but also enhance the protability of the load card, and it has a high repetition rate of use.At the same time, the diversity of the FMC standard and FPGA together,it can be modular design, convenient the upgrading of products, this reducese the development time for high index for high performance data acquisition products to the market.This research subject of PXI high speed data acquisition module is used the VITA-57FMC standards which is approved and published by American national standards institute (ANSI) which divides the module into data acquisition boards and FPGA in card.Data acquisition boards mainly realize the sampling rate3Gsa/s of the high speed data acquisition work, FPGA in card is complete high speed data receiving and storage, and through the PXI bus will store the data transmission to zero slot controller processing and operationsThis dissertation mainly introduces the design of the hardware system of3Gsa/s sample rate PXI high-speed data acquisition module,it mainly discussed FMC interface design, data collection storage and control circuit design, PXI interface circuit design finally, it discussed the module hardware debugging and test results.The specific content including:The design of the FMC high speed data acquisition module.It represents Signal conditioning channel, clock control circuit, ADC control circuit、the realize of the bilateral sampling technology next3Gsa/s sampling rate.The design of the FPGA data load ard module.It mainly discussed the High speed data receiving, trigger control, storage and reading modules and the decoder circuit.The design of the interface circuit.It Use special PCI interface integrated chips PCI9054realized PXI interface circuit design, so as to realize the communication with zero slot controller.