The Design And Implementation Of A Speech Recognition System Based On Fpga

The speech recognition technology continues to develop in recent years and hasbeen widely used in all walks of life, and the equipment with speech recognitioncapabilities is all households, which helps people to enjoy a good work and live. Deepresearch of speech signal processing technology and integrated circuit design methodmake the development of speech recognition technology in a whole new developmentplatform, and the speech recognition chip and FPGA-based speech recognitiontechnology came into being.This thesis systematically describes the human auditory system and the speechmodel and the pre-filtering, pre-emphasis, endpoint detection, framing and windows inuse of the digital speech signal processing theory. This thesis employs both the timedomain and frequency domain analysis method of the speech signal. Finally,time-domain speech signals are converted to the frequency domain in order to extractthe characteristic parameters of the speech signal. This article describes the LPC featureextraction algorithm, the ZCPA feature extraction algorithm and the MFCC featureextraction algorithm. We use the characteristic parameters to train the system model ofthe speech signal, and compare the characteristic parameters of the speech samples withthe model to get the speech recognition results. Usually, there are DTW and HMMalgorithm for model matching, and this paper uses the MFCC feature extractionmethods and continuous mixed Gaussian Function based Hidden Markov Model.This thesis simplify and optimize the speech recognition algorithm, analyze andmake a comparison among the Taylor expansion, semi-continuous hidden Markovmodels and take the maximum index, and simulate the simplified method in MATLAB.The actual result shows that taking the maximum index has a minimal impact on thesystem recognition rate. Therefore, the paper used it to simplify the system. At the sametime, to simplify the covariance matrix, this thesis uses diagonal covariance matrixinstead, which reduce the amount of system operations and does not affect systemperformance obviously.The SOPC speech recognition system consists of IP on FPGA in this article. This thesis adopts a modular system design approach. In addition to hardware accelerationmodule which is self-development, this thesis uses software and Xilinx IP to implementthe rest of the module. Hardware-accelerated IP takes top-down design approach to theprovision of parallel operation of multiple computing unit and use the pipelinetechnique to speed up data computing, it’s only one operation cycle for a result of thedata.The results show that the use of the SOPC speech recognition system on FPGA cancomplete complex computing tasks quickly, which meets the need for a speechrecognition and reduces the system’s R&D costs and implies a new technology directionin speech recognition.