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Research Of Programming And Performance Optimization Under Intel Many-core Architecture

Posted on:2013-10-28Degree:MasterType:Thesis
Country:ChinaCandidate:X Z YangFull Text:PDF
GTID:2248330374482167Subject:Computer technology
Abstract/Summary:PDF Full Text Request
Traditional parallel computing is based on clusters of computers, biological,meteorological, geological surveying, chemistry and other fields. Maturehigh-performance parallel computing software products that run on multiple nodes oflarge-scale computer clusters. The computing power of the computer cluster is certainlypowerful, but had to face many problems of high cost,high energy consumption andmaintenance overhead. With the development of parallel computing, the emergence of avariety of multi-core, many-core processor and the coprocessor. The computing powerof a single device to rise makes it possible to parallel computing tasks run on a specificdevice in a single node. Such as NVIDIA CUDA architecture, with hundreds of cores inthe coprocessors of the GPU device, applied on the traditional field of parallelcomputing, and guide a high-performance parallel programming revolution. However,due to the complexity of the CUDA programming mode requires the programmer tounderstanding of the hardware equipment used in a variety of parameters of the devicearchitecture in-depth, and the transplantation of the CUDA special development modelis not conducive to the existing sotfware to new platforms to support the program. Theparallel is relatively homogeneous. For these shortcomings, Intel introduced the MICplatform, a multiple x86-based core (Many Integrated Cores.),Single-nodehigh-performance application development entered a new era.Intel the MIC processor integrated on a single compute node,a co-processinghardware peripherals work together with the host CPU. MIC has dozens of computingcores, each core with a traditional CPU single core function is compatible with the x86instruction set on the CPU and the SIMD instruction set, which makes the clusterparallel program to the MIC transplantation easily, and MIC supports the complex andflexible programming on the computer cluster. MIC using low-power coprocessor, caneffectively reduce power consumption, increase the number of per-watt operation andease the maintenance of equipment. Therefore, on the Intel MIC architecture,ii applicationdevelopmentwillbecomeanewtrendattheareaofhigh-performancecomputingandparallelcomputing.thecontentsofthispaper:thispaperwilldescribeindetailthemictsenvironmentdeployment,andprogrammingframework.realizedthefftalgorithmbasedonthemichardwareplatformandthetraditionalparallelplatformsthebsdefinancialoptionsportingtothemicplatform.throughthepreparationofthecode,adjustingexcellenttransplantprocesstoillustratethemethodsandtechniquesofmicarchitectureprogramtuning.keywords:parallelprogramming;many-corecomputing;intelmic;performanceoptimization...
Keywords/Search Tags:parallel programming, many-core computing, Intel MIC, performance optimization
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